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Searched refs:dclk_div (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/video/fbdev/geode/
H A Ddisplay_gx1.c80 u32 gcfg, tcfg, ocfg, dclk_div, val; in gx1_set_mode() local
108 dclk_div = DC_GCFG_DCLK_DIV_1; /* FIXME: may need to divide DCLK by 2 sometimes? */ in gx1_set_mode()
109 gcfg |= dclk_div; in gx1_set_mode()
122 gcfg = DC_GCFG_VRDY | dclk_div; in gx1_set_mode()
/linux/drivers/clk/
H A Dclk-lmk04832.c1047 unsigned int dclk_div; in lmk04832_dclk_recalc_rate() local
1062 dclk_div = FIELD_GET(LMK04832_BIT_DCLK_DIV_MSB, msb) << 8 | lsb; in lmk04832_dclk_recalc_rate()
1063 rate = DIV_ROUND_CLOSEST(prate, dclk_div); in lmk04832_dclk_recalc_rate()
1074 unsigned int dclk_div; in lmk04832_dclk_determine_rate() local
1076 dclk_div = DIV_ROUND_CLOSEST(req->best_parent_rate, req->rate); in lmk04832_dclk_determine_rate()
1077 dclk_rate = DIV_ROUND_CLOSEST(req->best_parent_rate, dclk_div); in lmk04832_dclk_determine_rate()
1079 if (dclk_div < 1 || dclk_div > 0x3ff) { in lmk04832_dclk_determine_rate()
1097 unsigned int dclk_div; in lmk04832_dclk_set_rate() local
1100 dclk_div = DIV_ROUND_CLOSEST(prate, rate); in lmk04832_dclk_set_rate()
1102 if (dclk_div > 0x3ff) { in lmk04832_dclk_set_rate()
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/linux/drivers/gpu/drm/solomon/
H A Dssd130x.h85 u32 dclk_div; member
/linux/drivers/gpu/drm/radeon/
H A Drv770.c56 unsigned fb_div = 0, vclk_div = 0, dclk_div = 0; in rv770_set_uvd_clocks() local
76 &fb_div, &vclk_div, &dclk_div); in rv770_set_uvd_clocks()
82 dclk_div -= 1; in rv770_set_uvd_clocks()
106 UPLL_SW_HILEN2(dclk_div >> 1) | in rv770_set_uvd_clocks()
107 UPLL_SW_LOLEN2((dclk_div >> 1) + (dclk_div & 1)), in rv770_set_uvd_clocks()
H A Dr600.c205 unsigned fb_div = 0, ref_div, vclk_div = 0, dclk_div = 0; in r600_set_uvd_clocks() local
234 &fb_div, &vclk_div, &dclk_div); in r600_set_uvd_clocks()
263 UPLL_SW_HILEN2(dclk_div >> 1) | in r600_set_uvd_clocks()
264 UPLL_SW_LOLEN2((dclk_div >> 1) + (dclk_div & 1)) | in r600_set_uvd_clocks()
/linux/drivers/gpu/drm/rockchip/
H A Drockchip_vop2_reg.c1474 u32 ctrl, vp_clk_div, reg, dclk_div; in rk3576_set_intf_mux() local
1478 dclk_div = 2; in rk3576_set_intf_mux()
1480 dclk_div = 1; in rk3576_set_intf_mux()
1487 dclk_in_rate = adjusted_mode->crtc_clock / dclk_div; in rk3576_set_intf_mux()