| /linux/drivers/gpu/drm/amd/display/dc/hwss/ |
| H A D | hw_sequencer_private.h | 67 struct dce_hwseq;
109 void (*disable_vga)(struct dce_hwseq *hws);
115 void (*enable_power_gating_plane)(struct dce_hwseq *hws,
118 struct dce_hwseq *hws,
122 struct dce_hwseq *hws,
126 struct dce_hwseq *hws,
129 void (*dpp_pg_control)(struct dce_hwseq *hws,
132 void (*hubp_pg_control)(struct dce_hwseq *hws,
135 void (*dsc_pg_control)(struct dce_hwseq *hws,
138 bool (*dsc_pg_status)(struct dce_hwseq *hws,
[all …]
|
| H A D | hw_sequencer.h | 45 struct dce_hwseq;
232 void (*update_dchub)(struct dce_hwseq *hws,
316 int (*init_sys_ctx)(struct dce_hwseq *hws,
319 void (*init_vm_ctx)(struct dce_hwseq *hws,
464 void (*setup_hpo_hw_control)(const struct dce_hwseq *hws, bool enable);
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_hwseq.h | 36 void dcn35_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
38 void dcn35_dpp_root_clock_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool clock_on);
40 void dcn35_dpstream_root_clock_control(struct dce_hwseq *hws, unsigned int dp_hpo_inst, bool clock_…
42 void dcn35_physymclk_root_clock_control(struct dce_hwseq *hws, unsigned int phy_inst, bool clock_on…
44 void dcn35_enable_power_gating_plane(struct dce_hwseq *hws, bool enable);
46 void dcn35_set_dmu_fgcg(struct dce_hwseq *hws, bool enable);
85 void dcn35_setup_hpo_hw_control(const struct dce_hwseq *hws, bool enable);
87 struct dce_hwseq *hws,
|
| H A D | dcn35_hwseq.c | 78 struct dce_hwseq *hws = dc->hwseq;
116 void dcn35_set_dmu_fgcg(struct dce_hwseq *hws, bool enable) in dcn35_set_dmu_fgcg()
125 void dcn35_setup_hpo_hw_control(const struct dce_hwseq *hws, bool enable) in dcn35_setup_hpo_hw_control()
133 struct dce_hwseq *hws = dc->hwseq; in dcn35_init_hw()
461 void dcn35_dpp_root_clock_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool clock_on) in dcn35_dpp_root_clock_control()
472 void dcn35_dpstream_root_clock_control(struct dce_hwseq *hws, unsigned int dp_hpo_inst, bool clock_… in dcn35_dpstream_root_clock_control()
483 void dcn35_physymclk_root_clock_control(struct dce_hwseq *hws, unsigned int phy_inst, bool clock_on) in dcn35_physymclk_root_clock_control()
495 struct dce_hwseq *hws, in dcn35_dsc_pg_control()
553 void dcn35_enable_power_gating_plane(struct dce_hwseq *hws, bool enable) in dcn35_enable_power_gating_plane()
695 struct dce_hwseq *hws = dc->hwseq; in dcn35_init_pipes()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.h | 97 struct dce_hwseq *hws);
100 struct dce_hwseq *hws,
103 struct dce_hwseq *hws,
107 struct dce_hwseq *hws,
126 struct dce_hwseq *hws,
134 struct dce_hwseq *hws,
140 void dcn20_dccg_init(struct dce_hwseq *hws);
141 int dcn20_init_sys_ctx(struct dce_hwseq *hws,
|
| H A D | dcn20_hwseq.c | 299 struct dce_hwseq *hws, in dcn20_enable_power_gating_plane()
348 void dcn20_dccg_init(struct dce_hwseq *hws) in dcn20_dccg_init()
373 struct dce_hwseq *hws) in dcn20_disable_vga()
400 struct dce_hwseq *hws = dc->hwseq; in dcn20_init_blank()
466 struct dce_hwseq *hws, in dcn20_dsc_pg_control()
543 struct dce_hwseq *hws, in dcn20_dpp_pg_control()
617 struct dce_hwseq *hws, in dcn20_hubp_pg_control()
695 struct dce_hwseq *hws = dc->hwseq; in dcn20_plane_atomic_disable()
819 struct dce_hwseq *hws = dc->hwseq; in dcn20_enable_stream_timing()
1104 struct dce_hwseq *hws = dc->hwseq; in dcn20_set_input_transfer_func()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn31/ |
| H A D | dcn31_hwseq.h | 36 struct dce_hwseq *hws,
41 struct dce_hwseq *hws,
49 void dcn31_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on);
50 int dcn31_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_co…
57 void dcn31_setup_hpo_hw_control(const struct dce_hwseq *hws, bool enable);
|
| H A D | dcn31_hwseq.c | 70 struct dce_hwseq *hws = dc->hwseq; in enable_memory_low_power()
110 struct dce_hwseq *hws = dc->hwseq; in dcn31_init_hw()
280 struct dce_hwseq *hws, in dcn31_dsc_pg_control()
344 struct dce_hwseq *hws, in dcn31_enable_power_gating_plane()
441 void dcn31_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) in dcn31_hubp_pg_control()
480 int dcn31_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_co… in dcn31_init_sys_ctx()
572 struct dce_hwseq *hws = dc->hwseq; in dcn31_reset_hw_ctx_wrap()
613 void dcn31_setup_hpo_hw_control(const struct dce_hwseq *hws, bool enable) in dcn31_setup_hpo_hw_control()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn303/ |
| H A D | dcn303_hwseq.h | 32 void dcn303_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on);
33 void dcn303_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on);
34 void dcn303_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
35 void dcn303_enable_power_gating_plane(struct dce_hwseq *hws, bool enable);
|
| H A D | dcn303_hwseq.c | 46 void dcn303_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on) in dcn303_dpp_pg_control()
51 void dcn303_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) in dcn303_hubp_pg_control()
56 void dcn303_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) in dcn303_dsc_pg_control()
61 void dcn303_enable_power_gating_plane(struct dce_hwseq *hws, bool enable) in dcn303_enable_power_gating_plane()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce/ |
| H A D | dce_hwseq.c | 40 void dce_enable_fe_clock(struct dce_hwseq *hws, in dce_enable_fe_clock()
53 struct dce_hwseq *hws = dc->hwseq; in dce_pipe_control_lock()
97 void dce_set_blender_mode(struct dce_hwseq *hws, in dce_set_blender_mode()
138 static void dce_disable_sram_shut_down(struct dce_hwseq *hws) in dce_disable_sram_shut_down()
145 static void dce_underlay_clock_enable(struct dce_hwseq *hws) in dce_underlay_clock_enable()
163 void dce_clock_gating_power_up(struct dce_hwseq *hws, in dce_clock_gating_power_up()
175 void dce_crtc_switch_to_clk_src(struct dce_hwseq *hws, in dce_crtc_switch_to_clk_src()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn314/ |
| H A D | dcn314_hwseq.h | 36 void dcn314_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
38 void dcn314_enable_power_gating_plane(struct dce_hwseq *hws, bool enable);
44 void dcn314_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context, un…
46 void dcn314_dpp_root_clock_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool clock_on);
|
| H A D | dcn314_hwseq.c | 199 struct dce_hwseq *hws, in dcn314_dsc_pg_control()
269 void dcn314_enable_power_gating_plane(struct dce_hwseq *hws, bool enable) in dcn314_enable_power_gating_plane()
342 struct dce_hwseq *hws = dc->hwseq; in dcn314_calculate_pix_rate_divider()
358 void dcn314_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context, un… in dcn314_resync_fifo_dccg_dio()
411 void dcn314_dpp_root_clock_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool clock_on) in dcn314_dpp_root_clock_control()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| H A D | dcn32_hwseq.h | 34 struct dce_hwseq *hws,
39 struct dce_hwseq *hws,
42 void dcn32_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on);
78 void dcn32_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context, uns…
107 struct dce_hwseq *hws,
|
| H A D | dcn32_hwseq.c | 70 struct dce_hwseq *hws, in dcn32_dsc_pg_control()
134 struct dce_hwseq *hws, in dcn32_enable_power_gating_plane()
163 void dcn32_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) in dcn32_hubp_pg_control()
522 struct dce_hwseq *hws = dc->hwseq; in dcn32_set_input_transfer_func()
719 struct dce_hwseq *hws = dc->hwseq; in dcn32_program_mall_pipe_config()
776 struct dce_hwseq *hws = dc->hwseq; in dcn32_init_hw()
1215 struct dce_hwseq *hws = dc->hwseq; in dcn32_calculate_pix_rate_divider()
1232 void dcn32_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context, uns… in dcn32_resync_fifo_dccg_dio()
1297 struct dce_hwseq *hws = link->dc->hwseq; in dcn32_unblank_stream()
1470 struct dce_hwseq *hws, in dcn32_dsc_pg_status()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn302/ |
| H A D | dcn302_hwseq.h | 31 void dcn302_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on);
32 void dcn302_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on);
33 void dcn302_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
|
| H A D | dcn302_hwseq.c | 45 void dcn302_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on) in dcn302_dpp_pg_control()
102 void dcn302_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) in dcn302_hubp_pg_control()
159 void dcn302_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) in dcn302_dsc_pg_control()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.h | 87 struct dce_hwseq *hws,
91 struct dce_hwseq *hws,
95 struct dce_hwseq *hws,
99 struct dce_hwseq *hws);
114 void dcn10_update_dchub(struct dce_hwseq *hws, struct dchub_init_data *dh_data);
|
| H A D | dcn10_hwseq.c | 133 struct dce_hwseq *hws = dc->hwseq; in log_mpc_crc()
614 struct dce_hwseq *hws, in dcn10_enable_power_gating_plane()
636 struct dce_hwseq *hws) in dcn10_disable_vga()
678 struct dce_hwseq *hws, in dcn10_dpp_pg_control()
739 struct dce_hwseq *hws, in dcn10_hubp_pg_control()
791 struct dce_hwseq *hws, in power_on_plane_resources()
818 struct dce_hwseq *hws = dc->hwseq; in undo_DEGVIDCN10_253_wa()
838 struct dce_hwseq *hws = dc->hwseq; in apply_DEGVIDCN10_253_wa()
868 struct dce_hwseq *hws = dc->hwseq; in dcn10_bios_golden_init()
1229 struct dce_hwseq *hws = dc->hwseq; in dcn10_plane_atomic_disconnect()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.c | 85 static bool gpu_addr_to_uma(struct dce_hwseq *hwseq, in gpu_addr_to_uma()
107 static void plane_address_in_gpu_space_to_uma(struct dce_hwseq *hwseq, in plane_address_in_gpu_space_to_uma()
138 struct dce_hwseq *hws = dc->hwseq; in dcn201_update_plane_addr()
168 struct dce_hwseq *hws = dc->hwseq; in dcn201_init_blank()
202 static void read_mmhub_vm_setup(struct dce_hwseq *hws) in read_mmhub_vm_setup()
227 struct dce_hwseq *hws = dc->hwseq; in dcn201_init_hw()
379 struct dce_hwseq *hws = dc->hwseq; in dcn201_plane_atomic_disconnect()
530 struct dce_hwseq *hws = dc->hwseq; in dcn201_pipe_control_lock()
597 struct dce_hwseq *hws = link->dc->hwseq; in dcn201_unblank_stream()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce120/ |
| H A D | dce120_hwseq.c | 194 struct dce_hwseq *hws, in dce120_update_dchub()
250 bool dce121_xgmi_enabled(struct dce_hwseq *hws) in dce121_xgmi_enabled()
|
| H A D | dce120_hwseq.h | 34 bool dce121_xgmi_enabled(struct dce_hwseq *hws);
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn21/ |
| H A D | dcn21_hwseq.c | 53 struct dce_hwseq *hws) in mmhub_update_page_table_config()
67 int dcn21_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_co… in dcn21_init_sys_ctx()
90 struct dce_hwseq *hws = dc->hwseq; in dcn21_s0i3_golden_init_wa()
|
| H A D | dcn21_hwseq.h | 33 int dcn21_init_sys_ctx(struct dce_hwseq *hws,
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dce120/ |
| H A D | dce120_resource.c | 802 static struct dce_hwseq *dce120_hwseq_create( in dce120_hwseq_create()
805 struct dce_hwseq *hws = kzalloc(sizeof(struct dce_hwseq), GFP_KERNEL); in dce120_hwseq_create()
816 static struct dce_hwseq *dce121_hwseq_create( in dce121_hwseq_create()
819 struct dce_hwseq *hws = kzalloc(sizeof(struct dce_hwseq), GFP_KERNEL); in dce121_hwseq_create()
|