| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.h | 36 struct dc_state *context,
40 struct dc_state *context,
45 struct dc_state *context,
49 struct dc_state *context,
64 bool dcn20_validate_bandwidth_fp(struct dc *dc, struct dc_state *context,
76 struct dc_state *context,
79 bool dcn21_validate_bandwidth_fp(struct dc *dc, struct dc_state *context, enum
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| H A D | dcn20_clk_mgr.h | 30 struct dc_state *context,
34 struct dc_state *context,
37 struct dc_state *context, bool safe_to_lower);
49 struct dc_state *context,
54 struct dc_state *context);
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml2_dc_resource_mgmt.c | 58 static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *state, const struct dc_p… in get_plane_id()
109 static struct pipe_ctx *find_master_pipe_of_stream(struct dml2_context *ctx, struct dc_state *state… in find_master_pipe_of_stream()
124 struct dc_state *state, unsigned int plane_id) in find_master_pipe_of_plane()
142 struct dc_state *state, unsigned int plane_id, unsigned int *pipes) in find_pipes_assigned_to_plane()
179 static bool validate_pipe_assignment(const struct dml2_context *ctx, const struct dc_state *state, … in validate_pipe_assignment()
247 static unsigned int find_preferred_pipe_candidates(const struct dc_state *existing_state, in find_preferred_pipe_candidates()
294 static unsigned int find_last_resort_pipe_candidates(const struct dc_state *existing_state, in find_last_resort_pipe_candidates()
346 struct dc_state *state, // The state we want to find a free mapping in in find_more_pipes_for_stream()
351 …const struct dc_state *existing_state) // The state (optional) that we want to minimize remapping … in find_more_pipes_for_stream()
415 struct dc_state *state, // The state we want to find a free mapping in in find_more_free_pipes()
[all …]
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| H A D | dml2_wrapper_fpu.c | 160 …ate_lowest_supported_state_for_temp_read(struct dml2_context *dml2, struct dc_state *display_state, in calculate_lowest_supported_state_for_temp_read()
269 struct dc_state *display_state, in dml_mode_support_wrapper()
359 static bool call_dml_mode_support_and_programming(struct dc_state *context, enum dc_validate_mode v… in call_dml_mode_support_and_programming()
401 bool dml2_validate_and_build_resource(const struct dc *in_dc, struct dc_state *context, in dml2_validate_and_build_resource()
511 bool dml2_validate_only(struct dc_state *context, enum dc_validate_mode validate_mode) in dml2_validate_only()
558 void dml2_prepare_mcache_programming(struct dc *in_dc, struct dc_state *context, struct dml2_contex… in dml2_prepare_mcache_programming()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.h | 38 void dcn31_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);
39 void dcn315_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);
42 struct dc *dc, struct dc_state *context,
56 struct dc_state *context,
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
| H A D | dce110_clk_mgr.h | 34 const struct dc_state *context,
40 struct dc_state *context);
42 uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context);
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn314/ |
| H A D | dcn314_hwseq.h | 34 void dcn314_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx);
42 void dcn314_calculate_pix_rate_divider(struct dc *dc, struct dc_state *context, const struct dc_str…
44 void dcn314_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context, un…
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_plane_priv.h | 33 uint8_t dc_plane_get_pipe_mask(struct dc_state *dc_state, const struct dc_plane_state *plane_state);
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn351/ |
| H A D | dcn351_hwseq.h | 32 void dcn351_calc_blocks_to_gate(struct dc *dc, struct dc_state *context,
34 void dcn351_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.h | 53 struct dc_state *context,
69 struct dc_state *context,
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm.c | 41 #include "dc/dc_state.h"
146 STATIC_IFN_KUNIT void dm_enable_per_frame_crtc_master_sync(struct dc_state *context);
1411 struct dc_state *state, bool enable) in dm_gpureset_toggle_interrupts()
1463 DEFINE_FREE(state_release, struct dc_state *, if (_T) dc_state_release(_T)) in DEFINE_FREE()
1467 struct dc_state *context __free(state_release) = NULL; in DEFINE_FREE()
1556 if (dm_new_plane_state->dc_state) { in dm_destroy_cached_state()
1557 WARN_ON(kref_read(&dm_new_plane_state->dc_state->refcount) > 1); in dm_destroy_cached_state()
1558 dc_plane_state_release(dm_new_plane_state->dc_state); in dm_destroy_cached_state()
1559 dm_new_plane_state->dc_state = NULL; in dm_destroy_cached_state()
1728 static void dm_gpureset_commit_state(struct dc_state *dc_stat in dm_gpureset_commit_state()
1461 DEFINE_FREE(state_release,struct dc_state *,if (_T)dc_state_release (_T)) DEFINE_FREE() argument
1721 dm_gpureset_commit_state(struct dc_state * dc_state,struct amdgpu_display_manager * dm) dm_gpureset_commit_state() argument
1849 struct dc_state *dc_state; dm_resume() local
3274 dm_update_mst_vcpi_slots_for_dsc(struct drm_atomic_commit * state,struct dc_state * dc_state,struct dsc_mst_fairness_vars * vars) dm_update_mst_vcpi_slots_for_dsc() argument
4445 amdgpu_dm_commit_streams(struct drm_atomic_commit * state,struct dc_state * dc_state) amdgpu_dm_commit_streams() argument
5015 struct dc_state *dc_state = NULL; amdgpu_dm_atomic_commit_tail() local
[all...] |
| H A D | amdgpu_dm.h | 610 struct dc_state *cached_dc_state;
951 struct dc_plane_state *dc_state; member
1065 struct dc_state *context;
1195 void dm_enable_per_frame_crtc_master_sync(struct dc_state *context);
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| H A D | amdgpu_dm_plane.c | 1279 if (dm_plane_state_new->dc_state && in amdgpu_dm_plane_helper_prepare_fb()
1280 dm_plane_state_old->dc_state != dm_plane_state_new->dc_state) { in amdgpu_dm_plane_helper_prepare_fb()
1282 dm_plane_state_new->dc_state; in amdgpu_dm_plane_helper_prepare_fb()
1525 if (!dm_plane_state->dc_state)
1550 if (dc_validate_plane(dc, dm_plane_state->dc_state) == DC_OK) in amdgpu_dm_plane_atomic_check()
1746 if (!dm_plane_state || !dm_plane_state->dc_state) in amdgpu_dm_plane_atomic_async_update()
1749 dc_plane_state = dm_plane_state->dc_state; in amdgpu_dm_plane_atomic_async_update()
1804 if (old_dm_plane_state->dc_state) { in amdgpu_dm_plane_drm_plane_reset()
1805 dm_plane_state->dc_state in amdgpu_dm_plane_drm_plane_reset()
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_resource.c | 126 static void start_new_topology_snapshot(struct dc *dc, struct dc_state *state) in start_new_topology_snapshot()
1828 struct dc_state *context) in resource_build_scaling_params_for_context()
2347 bool resource_is_pipe_topology_changed(const struct dc_state *state_a, in resource_is_pipe_topology_changed()
2348 const struct dc_state *state_b) in resource_is_pipe_topology_changed()
2508 static void resource_log_pipe_for_stream(struct dc *dc, struct dc_state *state, in resource_log_pipe_for_stream()
2545 static int resource_stream_to_stream_idx(struct dc_state *state, in resource_stream_to_stream_idx()
2565 void resource_log_pipe_topology_update(struct dc *dc, struct dc_state *state) in resource_log_pipe_topology_update()
2643 struct dc_state *context, in update_pipe_params_after_odm_slice_count_change()
2666 struct dc_state *context, in update_pipe_params_after_mpc_slice_count_change()
3089 static void swap_dio_link_enc_to_muxable_ctx(struct dc_state *context, in swap_dio_link_enc_to_muxable_ctx()
[all …]
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| H A D | dc.c | 189 static int get_seamless_boot_stream_count(struct dc_state *ctx) in get_seamless_boot_stream_count()
1192 struct dc_state *context) in disable_all_writeback_pipes_for_stream()
1203 struct dc_state *context, in apply_ctx_interdependent_lock()
1229 static void dc_update_visual_confirm_color(struct dc *dc, struct dc_state *context, struct pipe_ctx… in dc_update_visual_confirm_color()
1394 static void disable_dangling_plane(struct dc *dc, struct dc_state *context) in disable_dangling_plane()
1397 struct dc_state *dangling_context = dc_state_create_current_copy(dc); in disable_dangling_plane()
1398 struct dc_state *current_ctx; in disable_dangling_plane()
1504 struct dc_state *context) in disable_vbios_mode_if_required()
1670 struct dc_state *ctx) in enable_timing_multisync()
1694 struct dc_state *ctx) in program_timing_sync()
[all …]
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| H A D | dc_surface.c | 68 uint8_t dc_plane_get_pipe_mask(struct dc_state *dc_state, const struct dc_plane_state *plane_state) in dc_plane_get_pipe_mask() argument
74 struct pipe_ctx *pipe_ctx = &dc_state->res_ctx.pipe_ctx[i]; in dc_plane_get_pipe_mask()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| H A D | dcn32_clk_mgr.h | 36 struct dc_state *context, bool safe_to_lower);
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| H A D | dcn301_fpu.h | 37 struct dc_state *context,
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| /linux/arch/mips/mm/ |
| H A D | cerr-sb1.c | 445 struct dc_state { struct
450 static struct dc_state dc_states[] = { argument
466 struct dc_state *dsc = dc_states; in dc_state_str()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| H A D | dcn31_clk_mgr.h | 46 struct dc_state *context,
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.h | 36 void dcn201_plane_atomic_disconnect(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ct…
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn60/ |
| H A D | dcn60_hwseq.c | 56 struct dc_state *state, in dcn60_build_audio_output()
178 struct dc_state *context, in dcn60_apply_single_controller_ctx_to_hw()
322 struct dc_state *context) in dcn60_setup_audio_dto()
452 struct dc_state *context) in dcn60_apply_ctx_to_hw()
848 struct dc_state *context) in dcn60_get_ref_tg_for_hubbub_probe()
877 struct dc_state *context, in dcn60_build_hubbub_perfmon_sequence()
1056 void dcn60_program_perfmon(struct dc *dc, struct dc_state *context) in dcn60_program_perfmon()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/ |
| H A D | dcn60_clk_mgr.c | 183 struct dc_state *context, bool safe_to_lower, int ref_dppclk_khz) in dcn60_update_clocks_update_dpp_dto()
242 struct dc_state *context, in dcn60_update_clocks_update_dtb_dto()
280 struct dc_state *context, in dcn60_build_update_display_clocks_sequence()
830 struct dc_state *context) in dcn60_auto_dpm_test_log()
1042 struct dc_state *context, in dcn60_make_bandwidth_clocks_update_action()
1303 struct dc_state *context, in dcn60_build_update_bandwidth_clocks_sequence()
1325 struct dc_state *context, in dcn60_update_clocks()
1400 struct dc_state *context = dc->current_state; in dcn60_set_hard_min_memclk()
1536 struct dc_state *context, in dcn60_build_clock_update_for_bls()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.c | 1439 enum dc_status dcn30_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_st… in dcn30_add_stream_to_ctx()
1479 struct dc *dc, struct dc_state *context, in dcn30_populate_dml_pipes_from_context()
1535 struct dc_state *context, in dcn30_set_mcif_arb_params()
1745 struct dc_state *context, in dcn30_find_split_pipe()
1787 struct dc_state *context, in dcn30_internal_validate_bw()
2047 static int get_refresh_rate(struct dc_state *context) in get_refresh_rate()
2076 static int get_frame_rate_at_max_stretch_100hz(struct dc_state *context) in get_frame_rate_at_max_stretch_100hz()
2106 static bool is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch(struct dc_state *cont… in is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch()
2123 bool dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *co… in dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch()
2174 void dcn30_setup_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context) in dcn30_setup_mclk_switch_using_fw_based_vblank_stretch()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dce100/ |
| H A D | dce100_resource.c | 850 struct dc_state *context, in build_mapped_resource()
868 struct dc_state *context, in dce100_validate_bandwidth()
909 struct dc_state *context) in dce100_validate_surface_sets()
930 struct dc_state *context) in dce100_validate_global()
941 struct dc_state *new_ctx, in dce100_add_stream_to_ctx()
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