Home
last modified time | relevance | path

Searched refs:dat0 (Results 1 – 19 of 19) sorted by relevance

/freebsd/crypto/openssl/crypto/aes/asm/
H A Daesv8-armx.pl443 my ($dat0,$dat1,$in0,$in1,$tmp0,$tmp1,$tmp2,$rndlast)=map("q$_",(0..7));
445 my ($dat,$tmp,$rndzero_n_last)=($dat0,$tmp0,$tmp1);
472 vld1.8 {$dat0},[$inp]
478 aese $dat0,q5
479 aesmc $dat0,$dat0
481 aese $dat0,q6
482 aesmc $dat0,$dat0
486 aese $dat0,q8
487 aesmc $dat0,$dat0
489 aese $dat0,q9
[all …]
/freebsd/crypto/openssl/crypto/rc4/asm/
H A Drc4-parisc.pl95 $dat0="%r4";
172 ldi 3,$dat0
181 and,<> $out,$dat0,$rem ; is $out aligned?
190 and,<> $inp,$dat0,$acc ; is $inp aligned?
197 ldwx $rem($out),$dat0
207 vshd $dat0,$dat1,$iy ; align data
208 copy $dat1,$dat0
224 ldwx $inp($out),$dat0
227 xor $dat0,$acc,$acc
/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dmmci.txt23 - st,sig-dir-dat0 : bus signal direction pin used for DAT[0].
33 - st,sig-dir : signal direction polarity used for cmd, dat0 dat123.
63 st,sig-dir-dat0;
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddra72x-mmc-iodelay.dtsi39 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
50 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
61 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
72 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
83 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE15 | MUX_MODE0) /* mmc1_dat0.dat0 */
105 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat0.dat0 */
116 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat0.dat0 */
H A Ddra76x-mmc-iodelay.dtsi34 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
45 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */
56 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat0.dat0 */
67 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat0.dat0 */
H A Ddra7-mmc-iodelay.dtsi13 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
H A Ddra74x-mmc-iodelay.dtsi37 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
48 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
59 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */
70 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */
81 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat0.dat0 */
92 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat0.dat0 */
103 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat0.dat0 */
H A Dam57xx-sbc-am57x.dts34 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
/freebsd/crypto/openssl/crypto/sm4/asm/
H A Dvpsm4-armv8.pl111 my ($dat0,$dat1,$dat2,$dat3,$vt0,$vt1,$vt2,$vt3) = @_;
114 zip1 $vt0.4s,$dat0.4s,$dat1.4s
115 zip2 $vt1.4s,$dat0.4s,$dat1.4s
118 zip1 $dat0.2d,$vt0.2d,$vt2.2d
H A Dvpsm4_ex-armv8.pl114 my ($dat0,$dat1,$dat2,$dat3,$vt0,$vt1,$vt2,$vt3) = @_;
117 zip1 $vt0.4s,$dat0.4s,$dat1.4s
118 zip2 $vt1.4s,$dat0.4s,$dat1.4s
121 zip1 $dat0.2d,$vt0.2d,$vt2.2d
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dste-href.dtsi164 st,sig-dir-dat0;
H A Dste-snowball.dts257 st,sig-dir-dat0;
H A Dste-nomadik-stn8815.dtsi845 st,sig-dir-dat0;
H A Dste-ux500-samsung-janice.dts404 st,sig-dir-dat0;
/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra30-apalis.dtsi284 sdmmc3-dat0-pb7 {
617 sdmmc4-dat0-paa0 {
H A Dtegra30-apalis-v1.1.dtsi285 sdmmc3-dat0-pb7 {
618 sdmmc4-dat0-paa0 {
H A Dtegra124-apalis.dtsi373 sdmmc1-dat0-py7 {
492 sdmmc3-dat0-pb7 {
785 sdmmc4-dat0-paa0 {
H A Dtegra124-apalis-v1.2.dtsi376 sdmmc1-dat0-py7 {
495 sdmmc3-dat0-pb7 {
788 sdmmc4-dat0-paa0 {
H A Dtegra30-colibri.dtsi567 sdmmc4-dat0-paa0 {