Searched refs:da_xtp_glb_p0_parents (Results 1 – 1 of 1) sorted by relevance
| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt7988-topckgen.c | 99 static const char *const da_xtp_glb_p0_parents[] = { "top_xtal", "net2pll_d8" }; variable
237 MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_XTP_GLB_P0_SEL, "da_xtp_glb_p0_sel", da_xtp_glb_p0_parents,
239 MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_XTP_GLB_P1_SEL, "da_xtp_glb_p1_sel", da_xtp_glb_p0_parents,
242 MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_XTP_GLB_P2_SEL, "da_xtp_glb_p2_sel", da_xtp_glb_p0_parents,
244 MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_XTP_GLB_P3_SEL, "da_xtp_glb_p3_sel", da_xtp_glb_p0_parents,
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