Searched refs:current_sclk (Results 1 – 22 of 22) sorted by relevance
207 if (sclk < rdev->pm.current_sclk) in radeon_set_power_state()224 if (sclk != rdev->pm.current_sclk) { in radeon_set_power_state()228 rdev->pm.current_sclk = sclk; in radeon_set_power_state()1296 rdev->pm.current_sclk = rdev->pm.default_sclk; in radeon_pm_resume_old()1364 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()1427 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()1937 seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk); in radeon_debugfs_pm_info_show()
1357 u32 current_sclk; in trinity_patch_thermal_state() local1362 current_sclk = current_ps->levels[current_index].sclk; in trinity_patch_thermal_state()1365 current_sclk = pi->boot_pl.sclk; in trinity_patch_thermal_state()1370 if (ps->levels[0].sclk > current_sclk) in trinity_patch_thermal_state()1371 ps->levels[0].sclk = current_sclk; in trinity_patch_thermal_state()
1047 u32 current_sclk; in sumo_patch_thermal_state() local1052 current_sclk = current_ps->levels[current_index].sclk; in sumo_patch_thermal_state()1055 current_sclk = pi->boot_pl.sclk; in sumo_patch_thermal_state()1060 if (ps->levels[0].sclk > current_sclk) in sumo_patch_thermal_state()1061 ps->levels[0].sclk = current_sclk; in sumo_patch_thermal_state()
345 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_get_clock_info()
584 *value = rdev->pm.current_sclk / 100; in radeon_info_ioctl()
233 u32 sclk = rdev->pm.current_sclk; in radeon_get_i2c_prescale()
294 selected_sclk = rdev->pm.current_sclk; in rs690_crtc_bandwidth_compute()
728 u32 sclk = rdev->pm.current_sclk; in radeon_update_bandwidth_info()
946 selected_sclk = rdev->pm.current_sclk; in rv515_crtc_bandwidth_compute()
2190 wm_high.sclk = rdev->pm.current_sclk * 10; in evergreen_program_watermarks()2217 wm_low.sclk = rdev->pm.current_sclk * 10; in evergreen_program_watermarks()
2312 wm_high.sclk = rdev->pm.current_sclk * 10; in dce6_program_watermarks()2339 wm_low.sclk = rdev->pm.current_sclk * 10; in dce6_program_watermarks()
1613 u32 current_sclk; member
9256 wm_high.sclk = rdev->pm.current_sclk * 10; in dce8_program_watermarks()9296 wm_low.sclk = rdev->pm.current_sclk * 10; in dce8_program_watermarks()
338 u32 current_sclk; member
727 adev->pm.current_sclk = adev->clock.default_sclk; in amdgpu_atomfirmware_get_clock_info()
1005 wm_high.sclk = adev->pm.current_sclk * 10; in dce_v8_0_program_watermarks()1044 wm_low.sclk = adev->pm.current_sclk * 10; in dce_v8_0_program_watermarks()
879 wm_high.sclk = adev->pm.current_sclk * 10; in dce_v6_0_program_watermarks()906 wm_low.sclk = adev->pm.current_sclk * 10; in dce_v6_0_program_watermarks()
1052 wm_high.sclk = adev->pm.current_sclk * 10; in dce_v10_0_program_watermarks()1091 wm_low.sclk = adev->pm.current_sclk * 10; in dce_v10_0_program_watermarks()
1084 wm_high.sclk = adev->pm.current_sclk * 10; in dce_v11_0_program_watermarks()1123 wm_low.sclk = adev->pm.current_sclk * 10; in dce_v11_0_program_watermarks()
702 adev->pm.current_sclk = adev->clock.default_sclk; in amdgpu_atombios_get_clock_info()
3002 adev->pm.current_sclk = adev->clock.default_sclk; in kv_dpm_sw_init()
7741 adev->pm.current_sclk = adev->clock.default_sclk; in si_dpm_sw_init()