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Searched refs:ctrl_status (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/scsi/qla4xxx/
H A Dql4_inline.h45 writel(set_rmask(CSR_SCSI_INTR_ENABLE), &ha->reg->ctrl_status); in __qla4xxx_enable_intrs()
46 readl(&ha->reg->ctrl_status); in __qla4xxx_enable_intrs()
59 writel(clr_rmask(CSR_SCSI_INTR_ENABLE), &ha->reg->ctrl_status); in __qla4xxx_disable_intrs()
60 readl(&ha->reg->ctrl_status); in __qla4xxx_disable_intrs()
H A Dql4_init.c20 value = readw(&ha->reg->ctrl_status); in ql4xxx_set_mac_number()
711 writel(set_rmask(CSR_BOOT_ENABLE), &ha->reg->ctrl_status); in qla4xxx_start_firmware_from_flash()
712 readl(&ha->reg->ctrl_status); in qla4xxx_start_firmware_from_flash()
721 uint32_t ctrl_status; in qla4xxx_start_firmware_from_flash() local
724 ctrl_status = readw(&ha->reg->ctrl_status); in qla4xxx_start_firmware_from_flash()
728 if (ctrl_status & set_rmask(CSR_SCSI_PROCESSOR_INTR)) in qla4xxx_start_firmware_from_flash()
735 ha->host_no, __func__, ctrl_status, max_wait_time)); in qla4xxx_start_firmware_from_flash()
746 &ha->reg->ctrl_status); in qla4xxx_start_firmware_from_flash()
747 readl(&ha->reg->ctrl_status); in qla4xxx_start_firmware_from_flash()
829 &ha->reg->ctrl_status); in qla4xxx_start_firmware()
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H A Dql4_dbg.c56 (uint8_t) offsetof(struct isp_reg, ctrl_status), in qla4xxx_dump_registers()
57 readw(&ha->reg->ctrl_status)); in qla4xxx_dump_registers()
125 &ha->reg->ctrl_status); in qla4xxx_dump_registers()
130 &ha->reg->ctrl_status); in qla4xxx_dump_registers()
H A Dql4_isr.c1089 &ha->reg->ctrl_status); in qla4xxx_interrupt_service_routine()
1090 readl(&ha->reg->ctrl_status); in qla4xxx_interrupt_service_routine()
1150 intr_status = readl(&ha->reg->ctrl_status); in qla4xxx_intr_handler()
1171 if ((readl(&ha->reg->ctrl_status) & in qla4xxx_intr_handler()
1174 &ha->reg->ctrl_status); in qla4xxx_intr_handler()
1175 readl(&ha->reg->ctrl_status); in qla4xxx_intr_handler()
1179 &ha->reg->ctrl_status); in qla4xxx_intr_handler()
1180 readl(&ha->reg->ctrl_status); in qla4xxx_intr_handler()
1192 &ha->reg->ctrl_status); in qla4xxx_intr_handler()
1193 readl(&ha->reg->ctrl_status); in qla4xxx_intr_handler()
H A Dql4_os.c309 reg_val = readw(&ha->reg->ctrl_status); in qla4xxx_isp_check_reg()
4672 uint32_t ctrl_status; in qla4xxx_hw_reset() local
4686 ctrl_status = readw(&ha->reg->ctrl_status); in qla4xxx_hw_reset()
4687 if ((ctrl_status & CSR_SCSI_RESET_INTR) != 0) in qla4xxx_hw_reset()
4688 writel(set_rmask(CSR_SCSI_RESET_INTR), &ha->reg->ctrl_status); in qla4xxx_hw_reset()
4691 writel(set_rmask(CSR_SOFT_RESET), &ha->reg->ctrl_status); in qla4xxx_hw_reset()
4692 readl(&ha->reg->ctrl_status); in qla4xxx_hw_reset()
4707 uint32_t ctrl_status; in qla4xxx_soft_reset() local
4718 ctrl_status = readw(&ha->reg->ctrl_status); in qla4xxx_soft_reset()
4721 if ((ctrl_status & CSR_NET_RESET_INTR) == 0) in qla4xxx_soft_reset()
[all …]
H A Dql4_mbx.c26 writel(set_rmask(CSR_INTR_RISC), &ha->reg->ctrl_status); in qla4xxx_queue_mbox_cmd()
27 readl(&ha->reg->ctrl_status); in qla4xxx_queue_mbox_cmd()
34 intr_status = readl(&ha->reg->ctrl_status); in qla4xxx_process_mbox_intr()
H A Dql4_fw.h108 __le32 ctrl_status; member
/linux/drivers/scsi/qla2xxx/
H A Dqla_sup.c1217 wrt_reg_dword(&reg->ctrl_status, in qla24xx_unprotect_flash()
1218 rd_reg_dword(&reg->ctrl_status) | CSRX_FLASH_ENABLE); in qla24xx_unprotect_flash()
1219 rd_reg_dword(&reg->ctrl_status); /* PCI Posting. */ in qla24xx_unprotect_flash()
1260 wrt_reg_dword(&reg->ctrl_status, in qla24xx_protect_flash()
1261 rd_reg_dword(&reg->ctrl_status) & ~CSRX_FLASH_ENABLE); in qla24xx_protect_flash()
1486 wrt_reg_dword(&reg->ctrl_status, in qla24xx_write_nvram_data()
1487 rd_reg_dword(&reg->ctrl_status) | CSRX_FLASH_ENABLE); in qla24xx_write_nvram_data()
1488 rd_reg_dword(&reg->ctrl_status); /* PCI Posting. */ in qla24xx_write_nvram_data()
1510 wrt_reg_dword(&reg->ctrl_status, in qla24xx_write_nvram_data()
1511 rd_reg_dword(&reg->ctrl_status) & ~CSRX_FLASH_ENABLE); in qla24xx_write_nvram_data()
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H A Dqla_dbg.c334 wrt_reg_dword(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); in qla24xx_soft_reset()
336 if ((rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0) in qla24xx_soft_reset()
341 if (!(rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE)) in qla24xx_soft_reset()
344 wrt_reg_dword(&reg->ctrl_status, in qla24xx_soft_reset()
352 if ((rd_reg_dword(&reg->ctrl_status) & in qla24xx_soft_reset()
358 if (!(rd_reg_dword(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET)) in qla24xx_soft_reset()
804 wrt_reg_word(&reg->ctrl_status, 0x40); in qla2300_fw_dump()
807 wrt_reg_word(&reg->ctrl_status, 0x50); in qla2300_fw_dump()
810 wrt_reg_word(&reg->ctrl_status, 0x00); in qla2300_fw_dump()
840 wrt_reg_word(&reg->ctrl_status, 0x10); in qla2300_fw_dump()
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H A Dqla_init.c2909 ha->pci_attr = rd_reg_word(&reg->ctrl_status); in qla2100_pci_config()
2960 wrt_reg_word(&reg->ctrl_status, 0x20); in qla2300_pci_config()
2961 rd_reg_word(&reg->ctrl_status); in qla2300_pci_config()
2970 wrt_reg_word(&reg->ctrl_status, 0x0); in qla2300_pci_config()
2971 rd_reg_word(&reg->ctrl_status); in qla2300_pci_config()
2991 ha->pci_attr = rd_reg_word(&reg->ctrl_status); in qla2300_pci_config()
3035 ha->pci_attr = rd_reg_dword(&reg->ctrl_status); in qla24xx_pci_config()
3153 wrt_reg_word(&reg->ctrl_status, 0x20); in qla2x00_reset_chip()
3154 rd_reg_word(&reg->ctrl_status); /* PCI Posting. */ in qla2x00_reset_chip()
3167 wrt_reg_word(&reg->ctrl_status, 0x10); in qla2x00_reset_chip()
[all …]
H A Dqla_fw.h1172 __le32 ctrl_status; /* Control/Status. */ member
H A Dqla_def.h822 __le16 ctrl_status; /* Control/Status */ member
H A Dqla_mbx.c596 rd_reg_word(&reg->isp.ctrl_status), in qla2x00_mailbox_command()