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Searched refs:ctrl_reg1 (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/iio/pressure/
H A Dmpl3115.c94 u8 ctrl_reg1; member
109 data->ctrl_reg1 | MPL3115_CTRL1_OST); in mpl3115_request()
272 if (!(data->ctrl_reg1 & MPL3115_CTRL1_ACTIVE)) { in mpl3115_fill_trig_buffer()
424 u8 ctrl_reg1, u8 ctrl_reg4) in mpl3115_config_interrupt() argument
429 ctrl_reg1); in mpl3115_config_interrupt()
438 data->ctrl_reg1 = ctrl_reg1; in mpl3115_config_interrupt()
445 data->ctrl_reg1); in mpl3115_config_interrupt()
453 u8 ctrl_reg1, ctrl_reg4; in mpl3115_set_trigger_state() local
457 ctrl_reg1 = data->ctrl_reg1; in mpl3115_set_trigger_state()
461 ctrl_reg1 |= MPL3115_CTRL1_ACTIVE; in mpl3115_set_trigger_state()
[all …]
/linux/drivers/iio/magnetometer/
H A Dmag3110.c56 u8 ctrl_reg1; member
72 if ((data->ctrl_reg1 & MAG3110_CTRL_AC) == 0) { in mag3110_request()
75 data->ctrl_reg1 | MAG3110_CTRL_TM); in mag3110_request()
161 int ret, i = data->ctrl_reg1 >> MAG3110_CTRL_DR_SHIFT; in mag3110_calculate_sleep()
174 data->ctrl_reg1 & ~MAG3110_CTRL_AC); in mag3110_standby()
210 data->ctrl_reg1); in mag3110_active()
325 i = data->ctrl_reg1 >> MAG3110_CTRL_DR_SHIFT; in mag3110_read_raw()
352 data->ctrl_reg1 &= 0xff & ~MAG3110_CTRL_DR_MASK in __mag3110_write_raw()
354 data->ctrl_reg1 |= rate << MAG3110_CTRL_DR_SHIFT; in __mag3110_write_raw()
357 data->ctrl_reg1 |= MAG3110_CTRL_AC; in __mag3110_write_raw()
[all …]
/linux/drivers/input/misc/
H A Dkxtj9.c75 u8 ctrl_reg1; member
156 tj9->ctrl_reg1 &= 0xe7; in kxtj9_update_g_range()
157 tj9->ctrl_reg1 |= new_g_range; in kxtj9_update_g_range()
182 err = i2c_smbus_write_byte_data(tj9->client, CTRL_REG1, tj9->ctrl_reg1); in kxtj9_update_odr()
201 tj9->ctrl_reg1 &= PC1_OFF; in kxtj9_device_power_off()
202 err = i2c_smbus_write_byte_data(tj9->client, CTRL_REG1, tj9->ctrl_reg1); in kxtj9_device_power_off()
236 tj9->ctrl_reg1 |= PC1_ON; in kxtj9_enable()
237 err = i2c_smbus_write_byte_data(tj9->client, CTRL_REG1, tj9->ctrl_reg1); in kxtj9_enable()
442 tj9->ctrl_reg1 = tj9->pdata.res_12bit | tj9->pdata.g_range; in kxtj9_probe()
481 tj9->ctrl_reg1 |= DRDYE; in kxtj9_probe()
/linux/drivers/clk/hisilicon/
H A Dclk-hi3559a.c29 const u32 ctrl_reg1; member
46 void __iomem *ctrl_reg1; member
385 val = readl_relaxed(clk->ctrl_reg1); in clk_pll_set_rate()
393 writel_relaxed(val, clk->ctrl_reg1); in clk_pll_set_rate()
415 val = readl_relaxed(clk->ctrl_reg1); in clk_pll_recalc_rate()
420 val = readl_relaxed(clk->ctrl_reg1); in clk_pll_recalc_rate()
425 val = readl_relaxed(clk->ctrl_reg1); in clk_pll_recalc_rate()
475 p_clk->ctrl_reg1 = base + clks[i].ctrl_reg1; in hisi_clk_register_pll()
/linux/drivers/hwmon/
H A Daspeed-pwm-tacho.c211 u32 ctrl_reg1; member
222 .ctrl_reg1 = ASPEED_PTCR_TYPEM_CTRL1,
231 .ctrl_reg1 = ASPEED_PTCR_TYPEN_CTRL1,
240 .ctrl_reg1 = ASPEED_PTCR_TYPEO_CTRL1,
452 regmap_update_bits(regmap, type_params[type].ctrl_reg1, in aspeed_set_tacho_type_values()