Searched refs:ctrl_reg1 (Results 1 – 5 of 5) sorted by relevance
| /linux/drivers/input/misc/ |
| H A D | kxtj9.c | 75 u8 ctrl_reg1; member
156 tj9->ctrl_reg1 &= 0xe7; in kxtj9_update_g_range()
157 tj9->ctrl_reg1 |= new_g_range; in kxtj9_update_g_range()
182 err = i2c_smbus_write_byte_data(tj9->client, CTRL_REG1, tj9->ctrl_reg1); in kxtj9_update_odr()
201 tj9->ctrl_reg1 &= PC1_OFF; in kxtj9_device_power_off()
202 err = i2c_smbus_write_byte_data(tj9->client, CTRL_REG1, tj9->ctrl_reg1); in kxtj9_device_power_off()
236 tj9->ctrl_reg1 |= PC1_ON; in kxtj9_enable()
237 err = i2c_smbus_write_byte_data(tj9->client, CTRL_REG1, tj9->ctrl_reg1); in kxtj9_enable()
442 tj9->ctrl_reg1 = tj9->pdata.res_12bit | tj9->pdata.g_range; in kxtj9_probe()
481 tj9->ctrl_reg1 |= DRDYE; in kxtj9_probe()
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| /linux/drivers/clk/hisilicon/ |
| H A D | clk-hi3559a.c | 29 const u32 ctrl_reg1; member
46 void __iomem *ctrl_reg1; member
385 val = readl_relaxed(clk->ctrl_reg1); in clk_pll_set_rate()
393 writel_relaxed(val, clk->ctrl_reg1); in clk_pll_set_rate()
415 val = readl_relaxed(clk->ctrl_reg1); in clk_pll_recalc_rate()
420 val = readl_relaxed(clk->ctrl_reg1); in clk_pll_recalc_rate()
425 val = readl_relaxed(clk->ctrl_reg1); in clk_pll_recalc_rate()
475 p_clk->ctrl_reg1 = base + clks[i].ctrl_reg1; in hisi_clk_register_pll()
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| /linux/drivers/clk/eswin/ |
| H A D | clk.c | 109 val = readl_relaxed(clk->ctrl_reg1); in clk_pll_set_rate()
112 writel_relaxed(val, clk->ctrl_reg1); in clk_pll_set_rate()
146 val = readl_relaxed(clk->ctrl_reg1); in clk_pll_recalc_rate()
220 p_clk->ctrl_reg1 = data->base + clks[i].ctrl_reg1; in eswin_clk_register_pll()
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| /linux/drivers/iio/accel/ |
| H A D | mma8452.c | 109 u8 ctrl_reg1; member
290 return (data->ctrl_reg1 & MMA8452_CTRL_DR_MASK) >> in mma8452_get_odr_index()
576 data->ctrl_reg1 & ~MMA8452_CTRL_ACTIVE); in mma8452_standby()
582 data->ctrl_reg1); in mma8452_active()
721 data->ctrl_reg1 &= ~MMA8452_CTRL_DR_MASK; in __mma8452_write_raw()
722 data->ctrl_reg1 |= i << MMA8452_CTRL_DR_SHIFT; in __mma8452_write_raw()
727 data->ctrl_reg1); in __mma8452_write_raw()
1669 data->ctrl_reg1 = MMA8452_CTRL_ACTIVE | in mma8452_probe()
1675 data->ctrl_reg1); in mma8452_probe()
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| /linux/drivers/hwmon/ |
| H A D | aspeed-pwm-tacho.c | 211 u32 ctrl_reg1; member
222 .ctrl_reg1 = ASPEED_PTCR_TYPEM_CTRL1,
231 .ctrl_reg1 = ASPEED_PTCR_TYPEN_CTRL1,
240 .ctrl_reg1 = ASPEED_PTCR_TYPEO_CTRL1,
452 regmap_update_bits(regmap, type_params[type].ctrl_reg1, in aspeed_set_tacho_type_values()
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