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Searched refs:ctrl2 (Results 1 – 25 of 46) sorted by relevance

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/linux/drivers/rtc/
H A Drtc-rx8025.c116 static int rx8025_is_osc_stopped(enum rx_model model, int ctrl2) in rx8025_is_osc_stopped() argument
118 int xstp = ctrl2 & RX8025_BIT_CTRL2_XST; in rx8025_is_osc_stopped()
134 int ctrl2; in rx8025_check_validity() local
137 ctrl2 = rx8025_read_reg(client, RX8025_REG_CTRL2); in rx8025_check_validity()
138 if (ctrl2 < 0) in rx8025_check_validity()
139 return ctrl2; in rx8025_check_validity()
141 if (ctrl2 & RX8025_BIT_CTRL2_VDET) in rx8025_check_validity()
144 if (ctrl2 & RX8025_BIT_CTRL2_PON) { in rx8025_check_validity()
149 xstp = rx8025_is_osc_stopped(drvdata->model, ctrl2); in rx8025_check_validity()
161 int ctrl2 = rx8025_read_reg(client, RX8025_REG_CTRL2); in rx8025_reset_validity() local
[all …]
H A Drtc-rs5c372.c216 unsigned char ctrl2 = rs5c->regs[RS5C_REG_CTRL2]; in rs5c372_rtc_read_time() local
224 if ((rs5c->type == rtc_r2025sd && !(ctrl2 & R2x2x_CTRL2_XSTP)) || in rs5c372_rtc_read_time()
225 (rs5c->type == rtc_r2221tl && (ctrl2 & R2x2x_CTRL2_XSTP))) { in rs5c372_rtc_read_time()
231 if (ctrl2 & RS5C_CTRL2_XSTP) { in rs5c372_rtc_read_time()
264 unsigned char ctrl2; in rs5c372_rtc_set_time() local
289 ctrl2 = i2c_smbus_read_byte_data(client, addr); in rs5c372_rtc_set_time()
295 ctrl2 &= ~(R2x2x_CTRL2_VDET | R2x2x_CTRL2_PON); in rs5c372_rtc_set_time()
297 ctrl2 |= R2x2x_CTRL2_XSTP; in rs5c372_rtc_set_time()
299 ctrl2 &= ~R2x2x_CTRL2_XSTP; in rs5c372_rtc_set_time()
302 ctrl2 &= ~RS5C_CTRL2_XSTP; in rs5c372_rtc_set_time()
[all …]
H A Drtc-rc5t619.c123 unsigned int ctrl2; in rc5t619_rtc_read_time() local
125 err = regmap_read(rtc->rn5t618->regmap, RN5T618_RTC_CTRL2, &ctrl2); in rc5t619_rtc_read_time()
129 if (ctrl2 & CTRL2_PON) in rc5t619_rtc_read_time()
169 unsigned int ctrl2; in rc5t619_rtc_set_time() local
171 err = regmap_read(rtc->rn5t618->regmap, RN5T618_RTC_CTRL2, &ctrl2); in rc5t619_rtc_set_time()
175 if (ctrl2 & CTRL2_PON) in rc5t619_rtc_set_time()
355 unsigned int ctrl2; in rc5t619_rtc_probe() local
374 err = regmap_read(rtc->rn5t618->regmap, RN5T618_RTC_CTRL2, &ctrl2); in rc5t619_rtc_probe()
383 if (ctrl2 & CTRL2_PON) { in rc5t619_rtc_probe()
H A Drtc-pcf2127.c537 unsigned int ctrl2; in pcf2127_rtc_read_alarm() local
540 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL2, &ctrl2); in pcf2127_rtc_read_alarm()
553 alrm->enabled = ctrl2 & PCF2127_BIT_CTRL2_AIE; in pcf2127_rtc_read_alarm()
554 alrm->pending = ctrl2 & PCF2127_BIT_CTRL2_AF; in pcf2127_rtc_read_alarm()
670 unsigned int ctrl2; in pcf2127_rtc_irq() local
673 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL2, &ctrl2); in pcf2127_rtc_irq()
685 if (!(ctrl1 & PCF2127_CTRL1_IRQ_MASK || ctrl2 & PCF2127_CTRL2_IRQ_MASK)) in pcf2127_rtc_irq()
688 if (ctrl1 & PCF2127_BIT_CTRL1_TSF1 || ctrl2 & PCF2127_BIT_CTRL2_TSF2) in pcf2127_rtc_irq()
695 if (ctrl2 & PCF2127_CTRL2_IRQ_MASK) in pcf2127_rtc_irq()
697 ctrl2 & ~PCF2127_CTRL2_IRQ_MASK); in pcf2127_rtc_irq()
[all …]
/linux/drivers/comedi/drivers/
H A Dme_daq.c139 unsigned short ctrl2; /* Mirror of CONTROL_2 register */ member
168 devpriv->ctrl2 |= ME_CTRL2_PORT_A_ENA; in me_dio_insn_config()
170 devpriv->ctrl2 &= ~ME_CTRL2_PORT_A_ENA; in me_dio_insn_config()
172 devpriv->ctrl2 |= ME_CTRL2_PORT_B_ENA; in me_dio_insn_config()
174 devpriv->ctrl2 &= ~ME_CTRL2_PORT_B_ENA; in me_dio_insn_config()
176 writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG); in me_dio_insn_config()
250 devpriv->ctrl2 &= ~(ME_CTRL2_ADFIFO_ENA | ME_CTRL2_CHANLIST_ENA); in me_ai_insn_read()
251 writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG); in me_ai_insn_read()
256 devpriv->ctrl2 |= (ME_CTRL2_ADFIFO_ENA | ME_CTRL2_CHANLIST_ENA); in me_ai_insn_read()
257 writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG); in me_ai_insn_read()
[all …]
/linux/sound/soc/codecs/
H A Dssm2518.c407 unsigned int ctrl1 = 0, ctrl2 = 0; in ssm2518_set_dai_fmt() local
423 ctrl2 |= SSM2518_SAI_CTRL2_BCLK_INVERT; in ssm2518_set_dai_fmt()
430 ctrl2 |= SSM2518_SAI_CTRL2_BCLK_INVERT; in ssm2518_set_dai_fmt()
452 ctrl2 |= SSM2518_SAI_CTRL2_LRCLK_PULSE; in ssm2518_set_dai_fmt()
457 ctrl2 |= SSM2518_SAI_CTRL2_LRCLK_PULSE; in ssm2518_set_dai_fmt()
466 ctrl2 |= SSM2518_SAI_CTRL2_LRCLK_INVERT; in ssm2518_set_dai_fmt()
472 return regmap_write(ssm2518->regmap, SSM2518_REG_SAI_CTRL2, ctrl2); in ssm2518_set_dai_fmt()
526 unsigned int ctrl1, ctrl2; in ssm2518_set_tdm_slot() local
560 ctrl2 = SSM2518_SAI_CTRL2_SLOT_WIDTH_16; in ssm2518_set_tdm_slot()
563 ctrl2 = SSM2518_SAI_CTRL2_SLOT_WIDTH_24; in ssm2518_set_tdm_slot()
[all …]
H A Dak4613.c572 u8 ctrl2; in ak4613_dai_hw_params() local
579 ctrl2 = DFS_NORMAL_SPEED; in ak4613_dai_hw_params()
584 ctrl2 = DFS_DOUBLE_SPEED; in ak4613_dai_hw_params()
588 ctrl2 = DFS_QUAD_SPEED; in ak4613_dai_hw_params()
643 snd_soc_component_update_bits(component, CTRL2, DFS_MASK, ctrl2); in ak4613_dai_hw_params()
/linux/drivers/pci/
H A Dvc.c107 u32 ctrl, header, cap1, ctrl2; in pci_vc_enable() local
140 pci_read_config_dword(dev->bus->self, ctrl_pos2, &ctrl2); in pci_vc_enable()
141 if ((ctrl2 & PCI_VC_RES_CTRL_ID) == id) { in pci_vc_enable()
151 if (ctrl2 & PCI_VC_RES_CTRL_ENABLE) { in pci_vc_enable()
152 ctrl2 &= ~PCI_VC_RES_CTRL_ENABLE; in pci_vc_enable()
153 pci_write_config_dword(link, ctrl_pos2, ctrl2); in pci_vc_enable()
157 ctrl2 |= PCI_VC_RES_CTRL_ENABLE; in pci_vc_enable()
158 pci_write_config_dword(link, ctrl_pos2, ctrl2); in pci_vc_enable()
/linux/drivers/media/platform/renesas/vsp1/
H A Dvsp1_sru.c41 u32 ctrl2; member
56 .ctrl2 = VI6_SRU_CTRL2_PARAMS(24, 40, 255),
59 .ctrl2 = VI6_SRU_CTRL2_PARAMS(8, 16, 255),
62 .ctrl2 = VI6_SRU_CTRL2_PARAMS(36, 60, 255),
65 .ctrl2 = VI6_SRU_CTRL2_PARAMS(12, 27, 255),
68 .ctrl2 = VI6_SRU_CTRL2_PARAMS(48, 80, 255),
71 .ctrl2 = VI6_SRU_CTRL2_PARAMS(16, 36, 255),
297 vsp1_sru_write(sru, dlb, VI6_SRU_CTRL2, param->ctrl2); in sru_configure_stream()
/linux/drivers/crypto/bcm/
H A Dspu2.c445 static void spu2_dump_fmd_ctrl2(u64 ctrl2) in spu2_dump_fmd_ctrl2() argument
447 packet_log(" FMD CTRL2 %#16llx\n", ctrl2); in spu2_dump_fmd_ctrl2()
450 ctrl2 & SPU2_AAD1_OFFSET, in spu2_dump_fmd_ctrl2()
451 (ctrl2 & SPU2_AAD1_LEN) >> SPU2_AAD1_LEN_SHIFT); in spu2_dump_fmd_ctrl2()
453 (ctrl2 & SPU2_AAD2_OFFSET) >> SPU2_AAD2_OFFSET_SHIFT); in spu2_dump_fmd_ctrl2()
455 (ctrl2 & SPU2_PL_OFFSET) >> SPU2_PL_OFFSET_SHIFT); in spu2_dump_fmd_ctrl2()
472 spu2_dump_fmd_ctrl2(le64_to_cpu(fmd->ctrl2)); in spu2_dump_fmd()
561 u64 ctrl2; in spu2_fmd_init() local
582 ctrl2 = aad1_offset | in spu2_fmd_init()
591 fmd->ctrl2 = cpu_to_le64(ctrl2); in spu2_fmd_init()
[all …]
/linux/drivers/net/phy/
H A Dphy-c45.c111 int bt1_ctrl, ctrl1, ctrl2, ret; in genphy_c45_pma_setup_forced() local
121 ctrl2 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2); in genphy_c45_pma_setup_forced()
122 if (ctrl2 < 0) in genphy_c45_pma_setup_forced()
123 return ctrl2; in genphy_c45_pma_setup_forced()
130 ctrl2 &= ~(MDIO_PMA_CTRL2_TYPE | 0x30); in genphy_c45_pma_setup_forced()
135 ctrl2 |= MDIO_PMA_CTRL2_BASET1; in genphy_c45_pma_setup_forced()
137 ctrl2 |= MDIO_PMA_CTRL2_10BT; in genphy_c45_pma_setup_forced()
141 ctrl2 |= MDIO_PMA_CTRL2_100BTX; in genphy_c45_pma_setup_forced()
146 ctrl2 |= MDIO_PMA_CTRL2_1000BT; in genphy_c45_pma_setup_forced()
151 ctrl2 |= MDIO_PMA_CTRL2_2_5GBT; in genphy_c45_pma_setup_forced()
[all …]
H A Ddp83822.c367 int ctrl2; in dp83822_read_status() local
375 ctrl2 = phy_read(phydev, MII_DP83822_CTRL_2); in dp83822_read_status()
376 if (ctrl2 < 0) in dp83822_read_status()
377 return ctrl2; in dp83822_read_status()
379 if (!(ctrl2 & DP83822_FX_ENABLE)) { in dp83822_read_status()
381 DP83822_FX_ENABLE | ctrl2); in dp83822_read_status()
H A Dicplus.c351 u16 ctrl = 0, ctrl2 = 0; in ip101a_g_config_mdix() local
361 ctrl2 = IP101A_G_FORCE_MDIX; in ip101a_g_config_mdix()
379 IP101A_G_FORCE_MDIX, ctrl2); in ip101a_g_config_mdix()
/linux/drivers/gpu/drm/bridge/analogix/
H A Danalogix-i2c-dptx.c105 u8 ctrl2 = SP_AUX_EN; in anx_dp_aux_transfer() local
115 ctrl2 |= SP_ADDR_ONLY; in anx_dp_aux_transfer()
139 SP_ADDR_ONLY | SP_AUX_EN, ctrl2); in anx_dp_aux_transfer()
/linux/drivers/gpu/drm/aspeed/
H A Daspeed_gfx_crtc.c60 u32 ctrl2 = readl(priv->base + CRT_CTRL2); in aspeed_gfx_enable_controller() local
66 writel(ctrl2 | CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2); in aspeed_gfx_enable_controller()
72 u32 ctrl2 = readl(priv->base + CRT_CTRL2); in aspeed_gfx_disable_controller() local
75 writel(ctrl2 & ~CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2); in aspeed_gfx_disable_controller()
/linux/drivers/net/ethernet/aquantia/atlantic/hw_atl/
H A Dhw_atl_utils_fw2x.c418 u32 ctrl2, orig_ctrl2; in aq_fw2x_send_fw_request() local
432 ctrl2 = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR); in aq_fw2x_send_fw_request()
433 orig_ctrl2 = ctrl2 & BIT(CAPS_HI_FW_REQUEST); in aq_fw2x_send_fw_request()
434 ctrl2 = ctrl2 ^ BIT(CAPS_HI_FW_REQUEST); in aq_fw2x_send_fw_request()
435 aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, ctrl2); in aq_fw2x_send_fw_request()
/linux/drivers/extcon/
H A Dextcon-max14577.c198 u8 ctrl1, ctrl2 = 0; in max14577_muic_set_path() local
224 ctrl2 |= CTRL2_CPEN_MASK; /* LowPwr=0, CPEn=1 */ in max14577_muic_set_path()
226 ctrl2 |= CTRL2_LOWPWR_MASK; /* LowPwr=1, CPEn=0 */ in max14577_muic_set_path()
230 CTRL2_LOWPWR_MASK | CTRL2_CPEN_MASK, ctrl2); in max14577_muic_set_path()
238 ctrl1, ctrl2, attached ? "attached" : "detached"); in max14577_muic_set_path()
H A Dextcon-max8997.c201 u8 ctrl1, ctrl2 = 0; in max8997_muic_set_path() local
216 ctrl2 |= CONTROL2_CPEN_MASK; /* LowPwr=0, CPEn=1 */ in max8997_muic_set_path()
218 ctrl2 |= CONTROL2_LOWPWR_MASK; /* LowPwr=1, CPEn=0 */ in max8997_muic_set_path()
221 MAX8997_MUIC_REG_CONTROL2, ctrl2, in max8997_muic_set_path()
230 ctrl1, ctrl2, attached ? "attached" : "detached"); in max8997_muic_set_path()
H A Dextcon-max77843.c203 unsigned int ctrl1, ctrl2; in max77843_muic_set_path() local
225 ctrl2 = MAX77843_MUIC_CONTROL2_CPEN_MASK; in max77843_muic_set_path()
227 ctrl2 = MAX77843_MUIC_CONTROL2_LOWPWR_MASK; in max77843_muic_set_path()
232 MAX77843_MUIC_CONTROL2_CPEN_MASK, ctrl2); in max77843_muic_set_path()
240 ctrl1, ctrl2, attached ? "attached" : "detached"); in max77843_muic_set_path()
H A Dextcon-max77693.c261 unsigned int ctrl1, ctrl2 = 0; in max77693_muic_set_path() local
276 ctrl2 |= MAX77693_CONTROL2_CPEN_MASK; /* LowPwr=0, CPEn=1 */ in max77693_muic_set_path()
278 ctrl2 |= MAX77693_CONTROL2_LOWPWR_MASK; /* LowPwr=1, CPEn=0 */ in max77693_muic_set_path()
283 ctrl2); in max77693_muic_set_path()
291 ctrl1, ctrl2, attached ? "attached" : "detached"); in max77693_muic_set_path()
/linux/drivers/leds/
H A Dleds-is31fl319x.c254 u8 ctrl1 = 0, ctrl2 = 0; in is31fl3196_brightness_set() local
283 ctrl2 |= on << (i - 6); /* 6..8 => bit 0..2 */ in is31fl3196_brightness_set()
286 if (ctrl1 > 0 || ctrl2 > 0) { in is31fl3196_brightness_set()
288 ctrl1, ctrl2); in is31fl3196_brightness_set()
290 regmap_write(is31->regmap, IS31FL3196_CTRL2, ctrl2); in is31fl3196_brightness_set()
/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
H A Ddma.c202 __le32 ctrl2; /* buffer count and address extension */ member
303 return parity32(dd->addrlow ^ dd->addrhigh ^ dd->ctrl1 ^ dd->ctrl2); in dma64_dd_parity()
717 u32 ctrl2 = bufcount & D64_CTRL2_BC_MASK; in dma64_dd_upd() local
724 ddring[outidx].ctrl2 = cpu_to_le32(ctrl2); in dma64_dd_upd()
732 ctrl2 |= (ae << D64_CTRL2_AE_SHIFT) & D64_CTRL2_AE; in dma64_dd_upd()
736 ddring[outidx].ctrl2 = cpu_to_le32(ctrl2); in dma64_dd_upd()
740 ddring[outidx].ctrl2 = in dma64_dd_upd()
741 cpu_to_le32(ctrl2 | D64_CTRL2_PARITY); in dma64_dd_upd()
1517 (le32_to_cpu(di->txd64[i].ctrl2) & in dma_getnexttxp()
/linux/drivers/tty/serial/
H A Dmxs-auart.c946 u32 ctrl, ctrl2, div; in mxs_auart_dma_init()
952 ctrl2 = mxs_read(s, REG_CTRL2); in mxs_auart_settermios()
992 ctrl2 |= AUART_CTRL2_RXE; in mxs_auart_settermios()
994 ctrl2 &= ~AUART_CTRL2_RXE; in mxs_auart_settermios()
1001 ctrl2 &= ~(AUART_CTRL2_CTSEN | AUART_CTRL2_RTSEN); in mxs_auart_settermios()
1013 ctrl2 |= AUART_CTRL2_TXDMAE | AUART_CTRL2_RXDMAE in mxs_auart_settermios()
1018 ctrl2 |= AUART_CTRL2_RTSEN; in mxs_auart_settermios()
1020 ctrl2 |= AUART_CTRL2_CTSEN; in mxs_auart_settermios()
1041 mxs_write(ctrl2, s, REG_CTRL2); in mxs_auart_settermios()
957 u32 ctrl, ctrl2, div; mxs_auart_settermios() local
/linux/drivers/net/can/flexcan/
H A Dflexcan-core.c233 u32 ctrl2; /* MX6, VF610 - Not affected by Soft Reset */ member
1277 reg_ctrl2 = priv->read(&regs->ctrl2); in flexcan_set_bittiming_cbt()
1283 priv->write(reg_ctrl2, &regs->ctrl2); in flexcan_set_bittiming_cbt()
1312 priv->read(&regs->ctrl2), priv->read(&regs->fdctrl), in flexcan_set_bittiming_cbt()
1356 reg_ctrl2 = priv->read(&regs->ctrl2); in flexcan_ram_init()
1358 priv->write(reg_ctrl2, &regs->ctrl2); in flexcan_ram_init()
1366 priv->write(reg_ctrl2, &regs->ctrl2); in flexcan_ram_init()
1556 reg_ctrl2 = priv->read(&regs->ctrl2); in flexcan_chip_start()
1558 priv->write(reg_ctrl2, &regs->ctrl2); in flexcan_chip_start()
1637 reg_ctrl2 = priv->read(&regs->ctrl2); in flexcan_chip_start()
[all …]
/linux/drivers/mmc/host/
H A Dsdhci-pci-gli.c260 u16 ctrl2; in gli_set_9750() local
319 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in gli_set_9750()
320 ctrl2 &= ~SDHCI_CTRL_TUNED_CLK; in gli_set_9750()
321 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()
339 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in gli_set_9750()
340 ctrl2 &= ~SDHCI_CTRL_TUNED_CLK; in gli_set_9750()
341 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()

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