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Searched refs:ctl_reg (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/clk/bcm/
H A Dclk-bcm2835.c491 u32 ctl_reg; member
514 u32 ctl_reg; member
938 return (cprman_read(cprman, data->ctl_reg) & CM_ENABLE) != 0; in bcm2835_clock_is_on()
1053 while (cprman_read(cprman, data->ctl_reg) & CM_BUSY) { in bcm2835_clock_wait_busy()
1070 cprman_write(cprman, data->ctl_reg, in bcm2835_clock_off()
1071 cprman_read(cprman, data->ctl_reg) & ~CM_ENABLE); in bcm2835_clock_off()
1085 cprman_write(cprman, data->ctl_reg, in bcm2835_clock_on()
1086 cprman_read(cprman, data->ctl_reg) | in bcm2835_clock_on()
1124 ctl = cprman_read(cprman, data->ctl_reg) & ~CM_FRAC; in bcm2835_clock_set_rate()
1126 cprman_write(cprman, data->ctl_reg, ctl); in bcm2835_clock_set_rate()
[all …]
/linux/drivers/pinctrl/qcom/
H A Dpinctrl-lpass-lpi.c167 u32 ctl_reg; in lpi_config_get() local
169 ctl_reg = lpi_gpio_read(state, pin, LPI_GPIO_CFG_REG); in lpi_config_get()
170 is_out = ctl_reg & LPI_GPIO_OE_MASK; in lpi_config_get()
171 pull = FIELD_GET(LPI_GPIO_PULL_MASK, ctl_reg); in lpi_config_get()
389 u32 ctl_reg; in lpi_gpio_dbg_show_one() local
400 ctl_reg = lpi_gpio_read(state, offset, LPI_GPIO_CFG_REG); in lpi_gpio_dbg_show_one()
401 is_out = ctl_reg & LPI_GPIO_OE_MASK; in lpi_gpio_dbg_show_one()
403 func = FIELD_GET(LPI_GPIO_FUNCTION_MASK, ctl_reg); in lpi_gpio_dbg_show_one()
404 drive = FIELD_GET(LPI_GPIO_OUT_STRENGTH_MASK, ctl_reg); in lpi_gpio_dbg_show_one()
405 pull = FIELD_GET(LPI_GPIO_PULL_MASK, ctl_reg); in lpi_gpio_dbg_show_one()
H A Dpinctrl-msm.c653 u32 ctl_reg, io_reg; in msm_gpio_dbg_show_one() local
672 ctl_reg = msm_readl_ctl(pctrl, g); in msm_gpio_dbg_show_one()
675 is_out = !!(ctl_reg & BIT(g->oe_bit)); in msm_gpio_dbg_show_one()
676 func = (ctl_reg >> g->mux_bit) & 7; in msm_gpio_dbg_show_one()
677 drive = (ctl_reg >> g->drv_bit) & 7; in msm_gpio_dbg_show_one()
678 pull = (ctl_reg >> g->pull_bit) & 3; in msm_gpio_dbg_show_one()
680 if (pctrl->soc->egpio_func && ctl_reg & BIT(g->egpio_present)) in msm_gpio_dbg_show_one()
681 egpio_enable = !(ctl_reg & BIT(g->egpio_enable)); in msm_gpio_dbg_show_one()
H A Dpinctrl-qdf2xxx.c105 groups[gpio].ctl_reg = 0x10000 * gpio; in qdf2xxx_pinctrl_probe()
H A Dpinctrl-ipq8064.c182 .ctl_reg = 0x1000 + 0x10 * id, \
209 .ctl_reg = ctl, \
H A Dpinctrl-apq8064.c230 .ctl_reg = 0x1000 + 0x10 * id, \
257 .ctl_reg = ctl, \
H A Dpinctrl-apq8084.c342 .ctl_reg = 0x1000 + 0x10 * id, \
369 .ctl_reg = ctl, \
H A Dpinctrl-kaanapali.c33 .ctl_reg = REG_SIZE * id, \
63 .ctl_reg = ctl, \
88 .ctl_reg = ctl, \
H A Dpinctrl-ipq4019.c241 .ctl_reg = 0x0 + 0x1000 * id, \
/linux/drivers/net/ethernet/aquantia/atlantic/macsec/
H A Dmacsec_api.c1996 struct mss_egress_ctl_register ctl_reg; in clear_egress_counters() local
1999 memset(&ctl_reg, 0, sizeof(ctl_reg)); in clear_egress_counters()
2002 &ctl_reg.word_0); in clear_egress_counters()
2007 &ctl_reg.word_1); in clear_egress_counters()
2012 ctl_reg.bits_0.clear_counter = 0; in clear_egress_counters()
2014 MSS_EGRESS_CTL_REGISTER_ADDR, ctl_reg.word_0); in clear_egress_counters()
2019 ctl_reg.word_1); in clear_egress_counters()
2023 ctl_reg.bits_0.clear_counter = 1; in clear_egress_counters()
2025 MSS_EGRESS_CTL_REGISTER_ADDR, ctl_reg.word_0); in clear_egress_counters()
2030 ctl_reg.word_1); in clear_egress_counters()
[all …]
/linux/drivers/scsi/csiostor/
H A Dcsio_mb.c1162 uint32_t ctl_reg = PF_REG(hw->pfn, CIM_PF_MAILBOX_CTRL_A); in csio_mb_debug_cmd_handler() local
1174 MBOWNER_V(CSIO_MBOWNER_FW), ctl_reg); in csio_mb_debug_cmd_handler()
1176 csio_rd_reg32(hw, ctl_reg); in csio_mb_debug_cmd_handler()
1196 uint32_t ctl_reg = PF_REG(hw->pfn, CIM_PF_MAILBOX_CTRL_A); in csio_mb_issue() local
1233 owner = MBOWNER_G(csio_rd_reg32(hw, ctl_reg)); in csio_mb_issue()
1238 owner = MBOWNER_G(csio_rd_reg32(hw, ctl_reg)); in csio_mb_issue()
1281 MBOWNER_V(CSIO_MBOWNER_FW), ctl_reg); in csio_mb_issue()
1284 ctl_reg); in csio_mb_issue()
1287 csio_rd_reg32(hw, ctl_reg); in csio_mb_issue()
1302 ctl = csio_rd_reg32(hw, ctl_reg); in csio_mb_issue()
[all …]
/linux/sound/pci/echoaudio/
H A Dechoaudio_3g.c61 __le32 ctl_reg, frq_reg; in write_control_reg() local
69 ctl_reg = cpu_to_le32(ctl); in write_control_reg()
72 if (ctl_reg != chip->comm_page->control_register || in write_control_reg()
75 chip->comm_page->control_register = ctl_reg; in write_control_reg()
/linux/drivers/misc/
H A Dphantom.c60 u32 ctl_reg; member
119 r.value |= dev->ctl_reg & PHN_CTL_AMP; in phantom_ioctl()
120 dev->ctl_reg = r.value; in phantom_ioctl()
308 dev->ctl_reg ^= PHN_CTL_AMP; in phantom_isr()
309 iowrite32(dev->ctl_reg, dev->iaddr + PHN_CONTROL); in phantom_isr()
/linux/drivers/net/ethernet/intel/ice/
H A Dice_ptp.c2025 u32 ctl_reg; member
2038 .ctl_reg = GLHH_ART_CTL,
2052 .ctl_reg = E830_GLPTM_ART_CTL,
2122 ctl = rd32(hw, cfg->ctl_reg); in ice_capture_crosststamp()
2124 wr32(hw, cfg->ctl_reg, ctl); in ice_capture_crosststamp()
2127 err = rd32_poll_timeout(hw, cfg->ctl_reg, ctl, !(ctl & cfg->ctl_active), in ice_capture_crosststamp()
/linux/drivers/scsi/lpfc/
H A Dlpfc_debugfs.c4935 void __iomem *ctl_reg; in lpfc_idiag_ctlacc_write() local
4971 ctl_reg = phba->sli4_hba.conf_regs_memmap_p + in lpfc_idiag_ctlacc_write()
4975 ctl_reg = phba->sli4_hba.conf_regs_memmap_p + in lpfc_idiag_ctlacc_write()
4979 ctl_reg = phba->sli4_hba.conf_regs_memmap_p + in lpfc_idiag_ctlacc_write()
4983 ctl_reg = phba->sli4_hba.conf_regs_memmap_p + in lpfc_idiag_ctlacc_write()
4987 ctl_reg = phba->sli4_hba.conf_regs_memmap_p + in lpfc_idiag_ctlacc_write()
4991 ctl_reg = phba->sli4_hba.conf_regs_memmap_p + in lpfc_idiag_ctlacc_write()
5001 reg_val = readl(ctl_reg); in lpfc_idiag_ctlacc_write()
5005 reg_val = readl(ctl_reg); in lpfc_idiag_ctlacc_write()
5008 writel(reg_val, ctl_reg); in lpfc_idiag_ctlacc_write()
[all …]
/linux/sound/soc/ti/
H A Ddavinci-mcasp.c171 static void mcasp_set_ctl_reg(struct davinci_mcasp *mcasp, u32 ctl_reg, u32 val) in mcasp_set_ctl_reg()
175 mcasp_set_bits(mcasp, ctl_reg, val); in mcasp_set_ctl_reg()
180 if ((mcasp_get_reg(mcasp, ctl_reg) & val) == val) in mcasp_is_synchronous()
184 if (i == 1000 && ((mcasp_get_reg(mcasp, ctl_reg) & val) != val)) in mcasp_is_synchronous()
163 mcasp_set_ctl_reg(struct davinci_mcasp * mcasp,u32 ctl_reg,u32 val) mcasp_set_ctl_reg() argument
/linux/drivers/gpu/drm/i915/display/
H A Dintel_dmc.c442 i915_reg_t ctl_reg, i915_reg_t htp_reg) in disable_event_handler() argument
444 intel_de_write(display, ctl_reg, in disable_event_handler()
/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dt4_hw.c297 u32 ctl_reg = PF_REG(mbox, CIM_PF_MAILBOX_CTRL_A); in t4_wr_mbox_meat_timeout() local
366 v = MBOWNER_G(t4_read_reg(adap, ctl_reg)); in t4_wr_mbox_meat_timeout()
368 v = MBOWNER_G(t4_read_reg(adap, ctl_reg)); in t4_wr_mbox_meat_timeout()
383 t4_write_reg(adap, ctl_reg, MBMSGVALID_F | MBOWNER_V(MBOX_OWNER_FW)); in t4_wr_mbox_meat_timeout()
384 t4_read_reg(adap, ctl_reg); /* flush write */ in t4_wr_mbox_meat_timeout()
401 v = t4_read_reg(adap, ctl_reg); in t4_wr_mbox_meat_timeout()
404 t4_write_reg(adap, ctl_reg, 0); in t4_wr_mbox_meat_timeout()
418 t4_write_reg(adap, ctl_reg, 0); in t4_wr_mbox_meat_timeout()
/linux/drivers/media/i2c/
H A Dds90ub960.c4261 u8 ctl_reg; in ub960_log_status() local
4264 ctl_reg = UB960_RR_BC_GPIO_CTL(i / 2); in ub960_log_status()
4267 ret = ub960_rxport_read(priv, nport, ctl_reg, &v, NULL); in ub960_log_status()