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Searched refs:ctl1_base (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/clk/nuvoton/
H A Dclk-ma35d1-pll.c72 void __iomem *ctl1_base; member
216 writel_relaxed(reg_ctl[1], pll->ctl1_base); in ma35d1_clk_pll_set_rate()
240 reg_ctl[1] = readl_relaxed(pll->ctl1_base); in ma35d1_clk_pll_recalc_rate()
275 reg_ctl[1] = readl_relaxed(pll->ctl1_base); in ma35d1_clk_pll_determine_rate()
290 u32 val = readl_relaxed(pll->ctl1_base); in ma35d1_clk_pll_is_prepared()
300 val = readl_relaxed(pll->ctl1_base); in ma35d1_clk_pll_prepare()
302 writel_relaxed(val, pll->ctl1_base); in ma35d1_clk_pll_prepare()
311 val = readl_relaxed(pll->ctl1_base); in ma35d1_clk_pll_unprepare()
313 writel_relaxed(val, pll->ctl1_base); in ma35d1_clk_pll_unprepare()
346 pll->ctl1_base = base + REG_PLL_CTL1_OFFSET; in ma35d1_reg_clk_pll()