Searched refs:ctl0_base (Results 1 – 1 of 1) sorted by relevance
71 void __iomem *ctl0_base; member215 writel_relaxed(reg_ctl[0], pll->ctl0_base); in ma35d1_clk_pll_set_rate()232 reg_ctl[0] = readl_relaxed(pll->ctl0_base); in ma35d1_clk_pll_recalc_rate()239 reg_ctl[0] = readl_relaxed(pll->ctl0_base); in ma35d1_clk_pll_recalc_rate()265 reg_ctl[0] = readl_relaxed(pll->ctl0_base); in ma35d1_clk_pll_determine_rate()274 reg_ctl[0] = readl_relaxed(pll->ctl0_base); in ma35d1_clk_pll_determine_rate()345 pll->ctl0_base = base + REG_PLL_CTL0_OFFSET; in ma35d1_reg_clk_pll()