Searched refs:csrows (Results 1 – 13 of 13) sorted by relevance
128 mci->nr_csrows, mci->csrows); in edac_mc_dump_mci()190 if (mci->csrows) { in mci_release()192 csr = mci->csrows[row]; in mci_release()203 kfree(mci->csrows); in mci_release()218 mci->csrows = kzalloc_objs(*mci->csrows, tot_csrows); in edac_mc_alloc_csrows()219 if (!mci->csrows) in edac_mc_alloc_csrows()225 csr = kzalloc_obj(**mci->csrows); in edac_mc_alloc_csrows()229 mci->csrows[row] = csr; in edac_mc_alloc_csrows()275 chan = mci->csrows[row]->channels[chn]; in edac_mc_alloc_dimms()611 struct csrow_info *csrow = mci->csrows[i]; in edac_mc_add_mc_with_groups()[all …]
102 mci->csrows[cs]->first_page, 0, 0, in pasemi_edac_process_error_info()109 mci->csrows[cs]->first_page, 0, 0, in pasemi_edac_process_error_info()132 csrow = mci->csrows[index]; in pasemi_edac_init_csrows()
94 struct csrow_info *csrow = mci->csrows[0]; in count_rec()127 struct csrow_info *csrow = mci->csrows[0]; in count_un_rec()231 struct csrow_info *csrow = mci->csrows[0]; in init_csrows()
337 csrow = mci->csrows[index]; in cpc925_init_csrows()452 if (mci->csrows[rank]->first_page == 0) { in cpc925_mc_get_pfn()460 pa = mci->csrows[rank]->first_page << PAGE_SHIFT; in cpc925_mc_get_pfn()
329 csrow = mci->csrows[row_index]; in fsl_mc_check()462 csrow = mci->csrows[index]; in fsl_ddr_init_csrows()
325 struct csrow_info *ri = mci->csrows[row]; in mci_reset_counters_store()455 struct csrow_info *csrow = mci->csrows[csrow_idx]; in mci_size_mb_show()
460 csi = mci->csrows[row]; in dmc520_init_csrow()
498 csi = mci->csrows[row]; in mc_init()
3109 dimm = mci->csrows[cs]->channels[umc]->dimm; in umc_init_csrows() 3158 csrow = mci->csrows[i]; in dct_init_csrows() 3591 dimm = mci->csrows[umc]->channels[cs]->dimm; in gpu_init_csrows()
601 csi = mci->csrows[row]; in init_csrows()
850 csi = mci->csrows[row]; in init_csrows()
544 struct csrow_info **csrows; member
219 They have chip selects (csrows) and channels. However, the layouts are different