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Searched refs:csrows (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/edac/
H A Dedac_mc.c128 mci->nr_csrows, mci->csrows); in edac_mc_dump_mci()
190 if (mci->csrows) { in mci_release()
192 csr = mci->csrows[row]; in mci_release()
203 kfree(mci->csrows); in mci_release()
218 mci->csrows = kzalloc_objs(*mci->csrows, tot_csrows); in edac_mc_alloc_csrows()
219 if (!mci->csrows) in edac_mc_alloc_csrows()
225 csr = kzalloc_obj(**mci->csrows); in edac_mc_alloc_csrows()
229 mci->csrows[row] = csr; in edac_mc_alloc_csrows()
275 chan = mci->csrows[row]->channels[chn]; in edac_mc_alloc_dimms()
611 struct csrow_info *csrow = mci->csrows[i]; in edac_mc_add_mc_with_groups()
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H A Dpasemi_edac.c102 mci->csrows[cs]->first_page, 0, 0, in pasemi_edac_process_error_info()
109 mci->csrows[cs]->first_page, 0, 0, in pasemi_edac_process_error_info()
132 csrow = mci->csrows[index]; in pasemi_edac_init_csrows()
H A Daspeed_edac.c94 struct csrow_info *csrow = mci->csrows[0]; in count_rec()
127 struct csrow_info *csrow = mci->csrows[0]; in count_un_rec()
233 struct csrow_info *csrow = mci->csrows[0]; in init_csrows()
H A Dcpc925_edac.c337 csrow = mci->csrows[index]; in cpc925_init_csrows()
452 if (mci->csrows[rank]->first_page == 0) { in cpc925_mc_get_pfn()
460 pa = mci->csrows[rank]->first_page << PAGE_SHIFT; in cpc925_mc_get_pfn()
H A Dedac_mc_sysfs.c325 struct csrow_info *ri = mci->csrows[row]; in mci_reset_counters_store()
455 struct csrow_info *csrow = mci->csrows[csrow_idx]; in mci_size_mb_show()
H A Dfsl_ddr_edac.c329 csrow = mci->csrows[row_index]; in fsl_mc_check()
462 csrow = mci->csrows[index]; in fsl_ddr_init_csrows()
H A Ddmc520_edac.c460 csi = mci->csrows[row]; in dmc520_init_csrow()
H A Dversalnet_edac.c498 csi = mci->csrows[row]; in mc_init()
H A Dversal_edac.c601 csi = mci->csrows[row]; in init_csrows()
H A Dsynopsys_edac.c850 csi = mci->csrows[row]; in init_csrows()
/linux/Documentation/driver-api/
H A Dedac.rst219 They have chip selects (csrows) and channels. However, the layouts are different