Searched refs:csr_base (Results 1 – 7 of 7) sorted by relevance
| /linux/drivers/char/hw_random/ |
| H A D | xgene-rng.c | 80 void __iomem *csr_base; member 111 writel(fro_val, ctx->csr_base + RNG_FRODETUNE); in xgene_rng_init_fro() 112 writel(0x00000000, ctx->csr_base + RNG_ALARMMASK); in xgene_rng_init_fro() 113 writel(0x00000000, ctx->csr_base + RNG_ALARMSTOP); in xgene_rng_init_fro() 114 writel(0xFFFFFFFF, ctx->csr_base + RNG_FROENABLE); in xgene_rng_init_fro() 121 val = readl(ctx->csr_base + RNG_INTR_STS_ACK); in xgene_rng_chk_overflow() 167 frostopped = readl(ctx->csr_base + RNG_ALARMSTOP); in xgene_rng_chk_overflow() 192 frostopped = readl(ctx->csr_base + RNG_ALARMSTOP); in xgene_rng_chk_overflow() 197 writel(val, ctx->csr_base + RNG_INTR_STS_ACK); in xgene_rng_chk_overflow() 216 val = readl(ctx->csr_base + RNG_INTR_STS_ACK); in xgene_rng_data_present() [all …]
|
| /linux/drivers/rtc/ |
| H A D | rtc-xgene.c | 37 void __iomem *csr_base; member 47 rtc_time64_to_tm(readl(pdata->csr_base + RTC_CCVR), tm); in xgene_rtc_read_time() 59 writel((u32)rtc_tm_to_time64(tm), pdata->csr_base + RTC_CLR); in xgene_rtc_set_time() 60 readl(pdata->csr_base + RTC_CLR); /* Force a barrier */ in xgene_rtc_set_time() 71 alrm->enabled = readl(pdata->csr_base + RTC_CCR) & RTC_CCR_IE; in xgene_rtc_read_alarm() 81 ccr = readl(pdata->csr_base + RTC_CCR); in xgene_rtc_alarm_irq_enable() 89 writel(ccr, pdata->csr_base + RTC_CCR); in xgene_rtc_alarm_irq_enable() 98 return readl(pdata->csr_base + RTC_CCR) & RTC_CCR_IE ? 1 : 0; in xgene_rtc_alarm_irq_enabled() 105 writel((u32)rtc_tm_to_time64(&alrm->time), pdata->csr_base + RTC_CMR); in xgene_rtc_set_alarm() 125 if (!(readl(pdata->csr_base + RTC_STAT) & RTC_STAT_BIT)) in xgene_rtc_interrupt() [all …]
|
| /linux/drivers/pci/controller/ |
| H A D | pcie-altera-msi.c | 34 void __iomem *csr_base; member 44 writel_relaxed(value, msi->csr_base + reg); in msi_writel() 49 return readl_relaxed(msi->csr_base + reg); in msi_readl() 217 msi->csr_base = devm_platform_ioremap_resource_byname(pdev, "csr"); in altera_msi_probe() 218 if (IS_ERR(msi->csr_base)) { in altera_msi_probe() 220 return PTR_ERR(msi->csr_base); in altera_msi_probe()
|
| H A D | pci-xgene.c | 64 void __iomem *csr_base; member 73 return readl(port->csr_base + reg); in xgene_pcie_readl() 78 writel(val, port->csr_base + reg); in xgene_pcie_writel() 240 port->csr_base = devm_pci_remap_cfg_resource(dev, &csr); in xgene_pcie_ecam_init() 241 if (IS_ERR(port->csr_base)) in xgene_pcie_ecam_init() 242 return PTR_ERR(port->csr_base); in xgene_pcie_ecam_init() 348 port->csr_base = devm_pci_remap_cfg_resource(dev, res); in xgene_pcie_map_reg() 349 if (IS_ERR(port->csr_base)) in xgene_pcie_map_reg() 350 return PTR_ERR(port->csr_base); in xgene_pcie_map_reg()
|
| /linux/drivers/ata/ |
| H A D | sata_fsl.c | 284 void __iomem *csr_base; member 353 void __iomem *csr_base = host_priv->csr_base; in fsl_sata_rx_watermark_show() local 356 rx_watermark = ioread32(csr_base + TRANSCFG); in fsl_sata_rx_watermark_show() 371 void __iomem *csr_base = host_priv->csr_base; in fsl_sata_rx_watermark_store() local 380 temp = ioread32(csr_base + TRANSCFG); in fsl_sata_rx_watermark_store() 382 iowrite32(temp | rx_watermark, csr_base + TRANSCFG); in fsl_sata_rx_watermark_store() 564 ioread32(COMMANDSTAT + host_priv->csr_base)); in sata_fsl_qc_issue() 641 ioread32(host_priv->csr_base + COMMANDSTAT)); in sata_fsl_freeze() 1427 void __iomem *csr_base = NULL; in sata_fsl_probe() local 1443 csr_base = hcr_base + 0x140; in sata_fsl_probe() [all …]
|
| /linux/drivers/phy/ |
| H A D | phy-xgene.c | 551 static void sds_wr(void __iomem *csr_base, u32 indirect_cmd_reg, in sds_wr() argument 560 writel(data, csr_base + indirect_data_reg); in sds_wr() 561 readl(csr_base + indirect_data_reg); /* Force a barrier */ in sds_wr() 562 writel(cmd, csr_base + indirect_cmd_reg); in sds_wr() 563 readl(csr_base + indirect_cmd_reg); /* Force a barrier */ in sds_wr() 565 val = readl(csr_base + indirect_cmd_reg); in sds_wr() 570 csr_base + indirect_cmd_reg, addr, data); in sds_wr() 573 static void sds_rd(void __iomem *csr_base, u32 indirect_cmd_reg, in sds_rd() argument 582 writel(cmd, csr_base + indirect_cmd_reg); in sds_rd() 583 readl(csr_base + indirect_cmd_reg); /* Force a barrier */ in sds_rd() [all …]
|
| /linux/drivers/net/ethernet/meta/fbnic/ |
| H A D | fbnic_txrx.c | 44 unsigned long csr_base = (unsigned long)ring->doorbell; in fbnic_ring_csr_base() local 46 csr_base &= ~(FBNIC_QUEUE_STRIDE * sizeof(u32) - 1); in fbnic_ring_csr_base() 48 return (u32 __iomem *)csr_base; in fbnic_ring_csr_base() 53 u32 __iomem *csr_base = fbnic_ring_csr_base(ring); in fbnic_ring_rd32() local 55 return readl(csr_base + csr); in fbnic_ring_rd32() 60 u32 __iomem *csr_base = fbnic_ring_csr_base(ring); in fbnic_ring_wr32() local 62 writel(val, csr_base + csr); in fbnic_ring_wr32()
|