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Searched refs:csr_base (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/char/hw_random/
H A Dxgene-rng.c79 void __iomem *csr_base; member
110 writel(fro_val, ctx->csr_base + RNG_FRODETUNE); in xgene_rng_init_fro()
111 writel(0x00000000, ctx->csr_base + RNG_ALARMMASK); in xgene_rng_init_fro()
112 writel(0x00000000, ctx->csr_base + RNG_ALARMSTOP); in xgene_rng_init_fro()
113 writel(0xFFFFFFFF, ctx->csr_base + RNG_FROENABLE); in xgene_rng_init_fro()
120 val = readl(ctx->csr_base + RNG_INTR_STS_ACK); in xgene_rng_chk_overflow()
166 frostopped = readl(ctx->csr_base + RNG_ALARMSTOP); in xgene_rng_chk_overflow()
191 frostopped = readl(ctx->csr_base + RNG_ALARMSTOP); in xgene_rng_chk_overflow()
196 writel(val, ctx->csr_base + RNG_INTR_STS_ACK); in xgene_rng_chk_overflow()
215 val = readl(ctx->csr_base + RNG_INTR_STS_ACK); in xgene_rng_data_present()
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/linux/drivers/rtc/
H A Drtc-xgene.c37 void __iomem *csr_base; member
47 rtc_time64_to_tm(readl(pdata->csr_base + RTC_CCVR), tm); in xgene_rtc_read_time()
59 writel((u32)rtc_tm_to_time64(tm), pdata->csr_base + RTC_CLR); in xgene_rtc_set_time()
60 readl(pdata->csr_base + RTC_CLR); /* Force a barrier */ in xgene_rtc_set_time()
71 alrm->enabled = readl(pdata->csr_base + RTC_CCR) & RTC_CCR_IE; in xgene_rtc_read_alarm()
81 ccr = readl(pdata->csr_base + RTC_CCR); in xgene_rtc_alarm_irq_enable()
89 writel(ccr, pdata->csr_base + RTC_CCR); in xgene_rtc_alarm_irq_enable()
98 return readl(pdata->csr_base + RTC_CCR) & RTC_CCR_IE ? 1 : 0; in xgene_rtc_alarm_irq_enabled()
105 writel((u32)rtc_tm_to_time64(&alrm->time), pdata->csr_base + RTC_CMR); in xgene_rtc_set_alarm()
125 if (!(readl(pdata->csr_base + RTC_STAT) & RTC_STAT_BIT)) in xgene_rtc_interrupt()
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/linux/drivers/pci/controller/
H A Dpcie-altera-msi.c34 void __iomem *csr_base; member
44 writel_relaxed(value, msi->csr_base + reg); in msi_writel()
49 return readl_relaxed(msi->csr_base + reg); in msi_readl()
217 msi->csr_base = devm_platform_ioremap_resource_byname(pdev, "csr"); in altera_msi_probe()
218 if (IS_ERR(msi->csr_base)) { in altera_msi_probe()
220 return PTR_ERR(msi->csr_base); in altera_msi_probe()
/linux/drivers/net/ethernet/meta/fbnic/
H A Dfbnic_debugfs.c29 u32 __iomem *csr_base; in fbnic_dbg_ring_show() local
31 csr_base = fbnic_ring_csr_base(ring); in fbnic_dbg_ring_show()
32 doorbell_offset = ring->doorbell - csr_base; in fbnic_dbg_ring_show()
43 tail = readl(csr_base + FBNIC_QUEUE_TWQ0_PTRS); in fbnic_dbg_ring_show()
47 tail = readl(csr_base + FBNIC_QUEUE_TWQ1_PTRS); in fbnic_dbg_ring_show()
51 head = readl(csr_base + FBNIC_QUEUE_TCQ_PTRS); in fbnic_dbg_ring_show()
55 tail = readl(csr_base + FBNIC_QUEUE_BDQ_HPQ_PTRS); in fbnic_dbg_ring_show()
59 tail = readl(csr_base + FBNIC_QUEUE_BDQ_PPQ_PTRS); in fbnic_dbg_ring_show()
63 head = readl(csr_base + FBNIC_QUEUE_RCQ_PTRS); in fbnic_dbg_ring_show()
H A Dfbnic_txrx.c44 unsigned long csr_base = (unsigned long)ring->doorbell; in fbnic_ring_csr_base() local
46 csr_base &= ~(FBNIC_QUEUE_STRIDE * sizeof(u32) - 1); in fbnic_ring_csr_base()
48 return (u32 __iomem *)csr_base; in fbnic_ring_csr_base()
53 u32 __iomem *csr_base = fbnic_ring_csr_base(ring); in fbnic_ring_rd32() local
55 return readl(csr_base + csr); in fbnic_ring_rd32()
60 u32 __iomem *csr_base = fbnic_ring_csr_base(ring); in fbnic_ring_wr32() local
62 writel(val, csr_base + csr); in fbnic_ring_wr32()
/linux/drivers/crypto/intel/qat/qat_common/
H A Dadf_accel_devices.h364 #define ADF_CSR_WR(csr_base, csr_offset, val) \ argument
365 __raw_writel(val, csr_base + csr_offset)
370 #define ADF_CSR_WR64_LO_HI(csr_base, csr_low_offset, csr_high_offset, val) \ argument
372 ADF_CSR_WR(csr_base, csr_low_offset, lower_32_bits(val)); \
373 ADF_CSR_WR(csr_base, csr_high_offset, upper_32_bits(val)); \
377 #define ADF_CSR_RD(csr_base, csr_offset) __raw_readl(csr_base + csr_offset) argument
/linux/drivers/phy/
H A Dphy-xgene.c551 static void sds_wr(void __iomem *csr_base, u32 indirect_cmd_reg, in sds_wr() argument
560 writel(data, csr_base + indirect_data_reg); in sds_wr()
561 readl(csr_base + indirect_data_reg); /* Force a barrier */ in sds_wr()
562 writel(cmd, csr_base + indirect_cmd_reg); in sds_wr()
563 readl(csr_base + indirect_cmd_reg); /* Force a barrier */ in sds_wr()
565 val = readl(csr_base + indirect_cmd_reg); in sds_wr()
570 csr_base + indirect_cmd_reg, addr, data); in sds_wr()
573 static void sds_rd(void __iomem *csr_base, u32 indirect_cmd_reg, in sds_rd() argument
582 writel(cmd, csr_base + indirect_cmd_reg); in sds_rd()
583 readl(csr_base + indirect_cmd_reg); /* Force a barrier */ in sds_rd()
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