Searched refs:crtcstate (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/gpu/drm/nouveau/dispnv04/ |
| H A D | cursor.c | 31 crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index) in crtc_wr_cio_state() argument
34 crtcstate->CRTC[index]); in crtc_wr_cio_state()
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| H A D | dfp.c | 95 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg; in nv04_dfp_disable() local
108 crtcstate[head].fp_control = FP_TG_CONTROL_OFF; in nv04_dfp_disable()
109 crtcstate[head].CRTC[NV_CIO_CRE_LCD__INDEX] &= in nv04_dfp_disable()
251 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg; in nv04_dfp_prepare() local
252 uint8_t *cr_lcd = &crtcstate[head].CRTC[NV_CIO_CRE_LCD__INDEX]; in nv04_dfp_prepare()
253 uint8_t *cr_lcd_oth = &crtcstate[head ^ 1].CRTC[NV_CIO_CRE_LCD__INDEX]; in nv04_dfp_prepare()
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| H A D | hw.c | 380 struct nv04_crtc_reg *crtcstate, int index) in rd_cio_state()
382 crtcstate->CRTC[index] = NVReadVgaCrtc(dev, head, index); in rd_cio_state()
387 struct nv04_crtc_reg *crtcstate, int index) in wr_cio_state()
389 NVWriteVgaCrtc(dev, head, index, crtcstate->CRTC[index]); in wr_cio_state()
381 rd_cio_state(struct drm_device * dev,int head,struct nv04_crtc_reg * crtcstate,int index) rd_cio_state() argument
388 wr_cio_state(struct drm_device * dev,int head,struct nv04_crtc_reg * crtcstate,int index) wr_cio_state() argument
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| H A D | crtc.c | 57 crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index) in crtc_wr_cio_state() argument
60 crtcstate->CRTC[index]); in crtc_wr_cio_state()
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