Searched refs:crtc_hsync_start (Results 1 – 14 of 14) sorted by relevance
196 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover; in amdgpu_panel_mode_fixup()197 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width; in amdgpu_panel_mode_fixup()
207 cpu_to_le16(mode->crtc_hsync_start - mode->crtc_hdisplay + amdgpu_crtc->h_border); in amdgpu_atombios_crtc_set_dtd_timing()209 cpu_to_le16(mode->crtc_hsync_end - mode->crtc_hsync_start); in amdgpu_atombios_crtc_set_dtd_timing()
358 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover; in radeon_panel_mode_fixup()359 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width; in radeon_panel_mode_fixup()
1812 mode->crtc_hsync_start = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart); in radeon_atom_get_tv_timings()1853 mode->crtc_hsync_start = le16_to_cpu(dtd_timings->usHActive) + in radeon_atom_get_tv_timings()1855 mode->crtc_hsync_end = mode->crtc_hsync_start + in radeon_atom_get_tv_timings()
457 bp = mode->crtc_htotal - mode->crtc_hsync_start; in sun4i_tcon0_mode_set_lvds()539 bp = mode->crtc_htotal - mode->crtc_hsync_start; in sun4i_tcon0_mode_set_rgb()562 hsync = mode->crtc_hsync_end - mode->crtc_hsync_start; in sun4i_tcon0_mode_set_rgb()641 bp = mode->crtc_htotal - mode->crtc_hsync_start; in sun4i_tcon1_mode_set()675 hsync = mode->crtc_hsync_end - mode->crtc_hsync_start; in sun4i_tcon1_mode_set()
324 u16 crtc_hsync_start; member
333 …REG_WRITE(hsync_reg, (adjusted_mode->crtc_hsync_start - 1) | ((adjusted_mode->crtc_hsync_end - 1) … in oaktrail_crtc_hdmi_mode_set()341 …REG_WRITE(PCH_HSYNC_B, (adjusted_mode->crtc_hsync_start - 1) | ((adjusted_mode->crtc_hsync_end - 1… in oaktrail_crtc_hdmi_mode_set()
272 REG_WRITE(map->hsync, (adjusted_mode->crtc_hsync_start - 1) | in psb_intel_crtc_mode_set()
788 REG_WRITE(map->hsync, (adjusted_mode->crtc_hsync_start - 1) | in cdv_intel_crtc_mode_set()
765 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; in psb_intel_sdvo_get_dtd_from_mode()770 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start; in psb_intel_sdvo_get_dtd_from_mode()
165 ENCODE_PGU_XY(m->crtc_hsync_start - m->crtc_hdisplay, in arc_pgu_mode_set()
580 adjusted_mode->crtc_hsync_start, in ns2501_mode_set()
1355 p->crtc_hsync_start = p->hsync_start; in drm_mode_set_crtcinfo()1407 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); in drm_mode_set_crtcinfo()
246 int horizStart = (mode->crtc_hsync_start >> 3) + 1; in nv_crtc_mode_set_vga()