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Searched refs:cq_host (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/mmc/host/
H A Dcqhci-core.c36 static bool cqhci_halted(struct cqhci_host *cq_host) in cqhci_halted() argument
38 return cqhci_readl(cq_host, CQHCI_CTL) & CQHCI_HALT; in cqhci_halted()
41 static inline u8 *get_desc(struct cqhci_host *cq_host, u8 tag) in get_desc() argument
43 return cq_host->desc_base + (tag * cq_host->slot_sz); in get_desc()
46 static inline u8 *get_link_desc(struct cqhci_host *cq_host, u8 tag) in get_link_desc() argument
48 u8 *desc = get_desc(cq_host, tag); in get_link_desc()
50 return desc + cq_host->task_desc_len; in get_link_desc()
53 static inline size_t get_trans_desc_offset(struct cqhci_host *cq_host, u8 tag) in get_trans_desc_offset() argument
55 return cq_host->trans_desc_len * cq_host->mmc->max_segs * tag; in get_trans_desc_offset()
58 static inline dma_addr_t get_trans_desc_dma(struct cqhci_host *cq_host, u8 tag) in get_trans_desc_dma() argument
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H A Dcqhci-crypto.c31 static void cqhci_crypto_program_key(struct cqhci_host *cq_host, in cqhci_crypto_program_key() argument
35 u32 slot_offset = cq_host->crypto_cfg_register + slot * sizeof(*cfg); in cqhci_crypto_program_key()
39 cqhci_writel(cq_host, 0, slot_offset + 16 * sizeof(cfg->reg_val[0])); in cqhci_crypto_program_key()
43 cqhci_writel(cq_host, le32_to_cpu(cfg->reg_val[i]), in cqhci_crypto_program_key()
47 cqhci_writel(cq_host, le32_to_cpu(cfg->reg_val[17]), in cqhci_crypto_program_key()
50 cqhci_writel(cq_host, le32_to_cpu(cfg->reg_val[16]), in cqhci_crypto_program_key()
59 struct cqhci_host *cq_host = cqhci_host_from_crypto_profile(profile); in cqhci_crypto_keyslot_program() local
61 cq_host->crypto_cap_array; in cqhci_crypto_keyslot_program()
70 for (i = 0; i < cq_host->crypto_capabilities.num_crypto_cap; i++) { in cqhci_crypto_keyslot_program()
94 cqhci_crypto_program_key(cq_host, &cfg, slot); in cqhci_crypto_keyslot_program()
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H A Dsdhci-brcmstb.c441 struct cqhci_host *cq_host; in sdhci_brcmstb_add_host() local
454 cq_host = devm_kzalloc(mmc_dev(host->mmc), in sdhci_brcmstb_add_host()
455 sizeof(*cq_host), GFP_KERNEL); in sdhci_brcmstb_add_host()
456 if (!cq_host) { in sdhci_brcmstb_add_host()
461 cq_host->mmio = host->ioaddr + SDHCI_ARASAN_CQE_BASE_ADDR; in sdhci_brcmstb_add_host()
462 cq_host->ops = &sdhci_brcmstb_cqhci_ops; in sdhci_brcmstb_add_host()
467 cq_host->caps |= CQHCI_TASK_DESC_SZ_128; in sdhci_brcmstb_add_host()
470 ret = cqhci_init(cq_host, host->mmc, dma64); in sdhci_brcmstb_add_host()
H A Dsdhci-pci-gli.c1739 struct cqhci_host *cq_host = mmc->cqe_private; in sdhci_gl9763e_cqe_pre_enable() local
1742 value = cqhci_readl(cq_host, CQHCI_CFG); in sdhci_gl9763e_cqe_pre_enable()
1744 cqhci_writel(cq_host, value, CQHCI_CFG); in sdhci_gl9763e_cqe_pre_enable()
1771 struct cqhci_host *cq_host = mmc->cqe_private; in sdhci_gl9763e_cqe_post_disable() local
1774 value = cqhci_readl(cq_host, CQHCI_CFG); in sdhci_gl9763e_cqe_post_disable()
1776 cqhci_writel(cq_host, value, CQHCI_CFG); in sdhci_gl9763e_cqe_post_disable()
1792 struct cqhci_host *cq_host; in gl9763e_add_host() local
1800 cq_host = devm_kzalloc(dev, sizeof(*cq_host), GFP_KERNEL); in gl9763e_add_host()
1801 if (!cq_host) { in gl9763e_add_host()
1806 cq_host->mmio = host->ioaddr + SDHCI_GLI_9763E_CQE_BASE_ADDR; in gl9763e_add_host()
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