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Searched refs:cpu_base (Results 1 – 8 of 8) sorted by relevance

/linux/kernel/time/
H A Dhrtimer.c162 .cpu_base = &migration_cpu_base,
191 raw_spin_lock_irqsave(&base->cpu_base->lock, *flags); in lock_hrtimer_base()
195 raw_spin_unlock_irqrestore(&base->cpu_base->lock, *flags); in lock_hrtimer_base()
239 return expires >= new_base->cpu_base->expires_next; in hrtimer_suitable_target()
295 raw_spin_unlock(&base->cpu_base->lock); in switch_hrtimer_base()
296 raw_spin_lock(&new_base->cpu_base->lock); in switch_hrtimer_base()
299 raw_spin_unlock(&new_base->cpu_base->lock); in switch_hrtimer_base()
300 raw_spin_lock(&base->cpu_base->lock); in switch_hrtimer_base()
319 __acquires(&timer->base->cpu_base->lock) in lock_hrtimer_base()
323 raw_spin_lock_irqsave(&base->cpu_base->lock, *flags); in lock_hrtimer_base()
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/linux/drivers/irqchip/
H A Dirq-gic.c72 union gic_base cpu_base; member
146 #define gic_data_cpu_base(d) __get_base(&(d)->cpu_base)
149 #define gic_data_cpu_base(d) ((d)->cpu_base.common_base)
338 void __iomem *cpu_base = gic_data_cpu_base(gic); in gic_handle_irq() local
341 irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK); in gic_handle_irq()
348 writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI); in gic_handle_irq()
442 void __iomem *cpu_base = gic_data_cpu_base(gic); in gic_cpu_if_up() local
450 if (gic_check_gicv2(cpu_base)) in gic_cpu_if_up()
452 writel_relaxed(0, cpu_base + GIC_CPU_ACTIVEPRIO + i * 4); in gic_cpu_if_up()
457 bypass = readl(cpu_base + GIC_CPU_CTRL); in gic_cpu_if_up()
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H A Dirq-hip04.c54 void __iomem *cpu_base; member
80 return hip04_data->cpu_base; in hip04_cpu_base()
202 void __iomem *cpu_base = hip04_data.cpu_base; in hip04_handle_irq() local
205 irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK); in hip04_handle_irq()
271 void __iomem *base = intc->cpu_base; in hip04_irq_cpu_init()
363 hip04_data.cpu_base = of_iomap(node, 1); in hip04_of_init()
364 WARN(!hip04_data.cpu_base, "unable to map hip04 intc cpu registers\n"); in hip04_of_init()
/linux/scripts/gdb/linux/
H A Dtimerlist.py67 cpu_base = cpus.per_cpu(hrtimer_bases, cpu)
75 text += print_base(cpu_base['clock_base'][i])
84 text += "\n".join([s.format(f, cpu_base[f]) for s, f in fmts])
/linux/arch/arm64/kvm/vgic/
H A Dvgic-v2.c405 static bool vgic_v2_check_base(gpa_t dist_base, gpa_t cpu_base) in vgic_v2_check_base() argument
409 if (cpu_base + KVM_VGIC_V2_CPU_SIZE < cpu_base) in vgic_v2_check_base()
412 if (dist_base + KVM_VGIC_V2_DIST_SIZE <= cpu_base) in vgic_v2_check_base()
414 if (cpu_base + KVM_VGIC_V2_CPU_SIZE <= dist_base) in vgic_v2_check_base()
/linux/drivers/media/platform/qcom/venus/
H A Dcore.c258 core->cpu_base = core->base + CPU_BASE_V6; in venus_assign_register_offsets()
272 core->cpu_base = core->base + CPU_BASE; in venus_assign_register_offsets()
/linux/drivers/net/ethernet/broadcom/
H A Dtg3.c3582 static int tg3_pause_cpu(struct tg3 *tp, u32 cpu_base) in tg3_pause_cpu() argument
3588 tw32(cpu_base + CPU_STATE, 0xffffffff); in tg3_pause_cpu()
3589 tw32(cpu_base + CPU_MODE, CPU_MODE_HALT); in tg3_pause_cpu()
3590 if (tr32(cpu_base + CPU_MODE) & CPU_MODE_HALT) in tg3_pause_cpu()
3618 static void tg3_resume_cpu(struct tg3 *tp, u32 cpu_base) in tg3_resume_cpu() argument
3620 tw32(cpu_base + CPU_STATE, 0xffffffff); in tg3_resume_cpu()
3621 tw32_f(cpu_base + CPU_MODE, 0x00000000); in tg3_resume_cpu()
3631 static int tg3_halt_cpu(struct tg3 *tp, u32 cpu_base) in tg3_halt_cpu() argument
3635 BUG_ON(cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)); in tg3_halt_cpu()
3643 if (cpu_base == RX_CPU_BASE) { in tg3_halt_cpu()
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H A Dbgmac.h424 struct bgmac_dma_desc *cpu_base; member