Searched refs:control_value (Results 1 – 4 of 4) sorted by relevance
/linux/drivers/gpu/drm/hisilicon/hibmc/ |
H A D | hibmc_drm_drv.c | 173 u32 control_value = 0; in hibmc_set_power_mode() local 183 control_value = readl(mmio + HIBMC_POWER_MODE_CTRL); in hibmc_set_power_mode() 184 control_value &= ~(HIBMC_PW_MODE_CTL_MODE_MASK | in hibmc_set_power_mode() 186 control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_MODE, power_mode); in hibmc_set_power_mode() 187 control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_OSC_INPUT, input); in hibmc_set_power_mode() 188 writel(control_value, mmio + HIBMC_POWER_MODE_CTRL); in hibmc_set_power_mode()
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/linux/drivers/mmc/host/ |
H A D | sdhci-pci-gli.c | 345 u32 control_value; in gli_set_9750() local 355 control_value = sdhci_readl(host, SDHCI_GLI_9750_TUNING_CONTROL); in gli_set_9750() 394 control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1; in gli_set_9750() 395 control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2; in gli_set_9750() 396 control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1, in gli_set_9750() 398 control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2, in gli_set_9750() 410 control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_EN; in gli_set_9750() 411 control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_EN, in gli_set_9750() 413 sdhci_writel(host, control_value, SDHCI_GLI_9750_TUNING_CONTROL); in gli_set_9750() 419 control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_EN; in gli_set_9750() [all …]
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/linux/drivers/gpu/drm/xe/ |
H A D | xe_mocs.c | 37 u32 control_value; member 114 .control_value = __control_value, \ 673 return info->table[index].control_value; in get_entry_control() 674 return info->table[info->unused_entries_index].control_value; in get_entry_control()
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/linux/drivers/net/ethernet/qlogic/netxen/ |
H A D | netxen_nic.h | 1421 u32 control_value; member 1496 u32 control_value; member
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