| /linux/drivers/infiniband/hw/mthca/ |
| H A D | mthca_cq.c | 181 return cqe_sw(get_cqe(cq, cq->cons_index & cq->ibcq.cqe)); in next_cqe_sw()
208 *cq->set_ci_db = cpu_to_be32(cq->cons_index); in update_cons_index()
289 for (prod_index = cq->cons_index; in mthca_cq_clean()
292 if (prod_index == cq->cons_index + cq->ibcq.cqe) in mthca_cq_clean()
297 qpn, cq->cqn, cq->cons_index, prod_index); in mthca_cq_clean()
303 while ((int) --prod_index - (int) cq->cons_index >= 0) { in mthca_cq_clean()
316 set_cqe_hw(get_cqe(cq, (cq->cons_index + i) & cq->ibcq.cqe)); in mthca_cq_clean()
318 cq->cons_index += nfreed; in mthca_cq_clean()
337 cq->cons_index &= cq->ibcq.cqe; in mthca_cq_resize_copy_cqes()
339 cq->cons_index -= cq->ibcq.cqe + 1; in mthca_cq_resize_copy_cqes()
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| H A D | mthca_eq.c | 237 eqe = get_eqe(eq, eq->cons_index); in next_eqe_sw()
363 ++eq->cons_index; in mthca_eq_int()
379 set_eq_ci(dev, eq, eq->cons_index); in mthca_eq_int()
411 dev->eq_table.eq[i].cons_index); in mthca_tavor_interrupt()
424 tavor_set_eq_ci(dev, eq, eq->cons_index); in mthca_tavor_msi_x_interrupt()
444 dev->eq_table.eq[i].cons_index); in mthca_arbel_interrupt()
458 arbel_set_eq_ci(dev, eq, eq->cons_index); in mthca_arbel_msi_x_interrupt()
554 eq->cons_index = 0; in mthca_create_eq()
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| H A D | mthca_provider.h | 91 u32 cons_index; member
188 u32 cons_index; member
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| /linux/include/linux/mlx5/ |
| H A D | cq.h | 50 u32 cons_index; member
143 *cq->set_ci_db = cpu_to_be32(cq->cons_index & 0xffffff); in mlx5_cq_set_ci()
153 u32 cons_index) in mlx5_cq_arm() argument
160 ci = cons_index & 0xffffff; in mlx5_cq_arm()
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| /linux/include/linux/mlx4/ |
| H A D | cq.h | 156 ci = cq->cons_index & 0xffffff; in mlx4_cq_arm()
174 *cq->set_ci_db = cpu_to_be32(cq->cons_index & 0xffffff); in mlx4_cq_set_ci()
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| H A D | device.h | 732 u32 cons_index; member
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| /linux/drivers/net/ethernet/mellanox/mlx4/ |
| H A D | eq.c | 99 __raw_writel((__force u32) cpu_to_be32((eq->cons_index & 0xffffff) | in eq_set_ci()
123 struct mlx4_eqe *eqe = get_eqe(eq, eq->cons_index, eqe_factor, size); in next_eqe_sw()
124 return !!(eqe->owner & 0x80) ^ !!(eq->cons_index & eq->nent) ? NULL : eqe; in next_eqe_sw()
543 eq->eqn, eq->cons_index, ret); in mlx4_eq_int()
573 eq->eqn, eq->cons_index, ret); in mlx4_eq_int()
698 eq->eqn, eq->cons_index, ret); in mlx4_eq_int()
783 eq->cons_index, eqe->owner, eq->nent, in mlx4_eq_int()
786 !!(eq->cons_index & eq->nent) ? "HW" : "SW"); in mlx4_eq_int()
808 eq->cons_index, eqe->owner, eq->nent, in mlx4_eq_int()
810 !!(eq->cons_index & eq->nent) ? "HW" : "SW"); in mlx4_eq_int()
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| H A D | en_rx.c | 711 index = cq->mcq.cons_index & ring->size_mask; in mlx4_en_process_rx_cq()
716 cq->mcq.cons_index & cq->size)) { in mlx4_en_process_rx_cq()
932 ++cq->mcq.cons_index; in mlx4_en_process_rx_cq()
933 index = (cq->mcq.cons_index) & ring->size_mask; in mlx4_en_process_rx_cq()
950 ring->cons = cq->mcq.cons_index; in mlx4_en_process_rx_cq()
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| H A D | mlx4.h | 397 u32 cons_index; member
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| /linux/drivers/net/ethernet/mellanox/mlx5/core/en/ |
| H A D | health.c | 58 devlink_fmsg_u32_pair_put(fmsg, "ci", eq->core.cons_index); in mlx5e_health_eq_diag_fmsg()
139 eq->core.eqn, eq->core.cons_index, eq->core.irqn); in mlx5e_health_channel_eq_recover()
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| /linux/drivers/net/ethernet/mellanox/mlx5/core/ |
| H A D | cq.c | 128 cq->cons_index = 0; in mlx5_create_cq()
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| /linux/drivers/vdpa/mlx5/net/ |
| H A D | mlx5_vnet.c | 496 return get_sw_cqe(cq, cq->mcq.cons_index); in next_cqe_sw()
507 vcq->mcq.cons_index++; in mlx5_vdpa_poll_one()
552 mlx5_cq_arm(&mvq->cq.mcq, MLX5_CQ_DB_REQ_NOT, uar_page, mvq->cq.mcq.cons_index); in mlx5_vdpa_cq_comp()
617 mlx5_cq_arm(&mvq->cq.mcq, MLX5_CQ_DB_REQ_NOT, uar_page, mvq->cq.mcq.cons_index); in cq_create()
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