Home
last modified time | relevance | path

Searched refs:config_reg (Results 1 – 25 of 28) sorted by relevance

12

/linux/drivers/iio/common/ms_sensors/
H A Dms_sensors_i2c.c254 u8 *config_reg) in ms_sensors_read_config_reg() argument
264 ret = i2c_master_recv(client, config_reg, 1); in ms_sensors_read_config_reg()
269 dev_dbg(&client->dev, "Config register :%x\n", *config_reg); in ms_sensors_read_config_reg()
288 u8 config_reg; in ms_sensors_write_resolution() local
291 ret = ms_sensors_read_config_reg(dev_data->client, &config_reg); in ms_sensors_write_resolution()
295 config_reg &= 0x7E; in ms_sensors_write_resolution()
296 config_reg |= ((i & 1) << 7) + ((i & 2) >> 1); in ms_sensors_write_resolution()
300 config_reg); in ms_sensors_write_resolution()
319 u8 config_reg; in ms_sensors_show_battery_low() local
322 ret = ms_sensors_read_config_reg(dev_data->client, &config_reg); in ms_sensors_show_battery_low()
[all …]
/linux/drivers/spi/
H A Dspi-zynqmp-gqspi.c355 u32 config_reg, baud_rate_val = 0; in zynqmp_qspi_init_hw() local
378 config_reg = zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST); in zynqmp_qspi_init_hw()
379 config_reg &= ~GQSPI_CFG_MODE_EN_MASK; in zynqmp_qspi_init_hw()
381 config_reg |= GQSPI_CFG_GEN_FIFO_START_MODE_MASK; in zynqmp_qspi_init_hw()
383 config_reg &= ~GQSPI_CFG_ENDIAN_MASK; in zynqmp_qspi_init_hw()
385 config_reg &= ~GQSPI_CFG_EN_POLL_TO_MASK; in zynqmp_qspi_init_hw()
387 config_reg |= GQSPI_CFG_WP_HOLD_MASK; in zynqmp_qspi_init_hw()
389 config_reg &= ~GQSPI_CFG_BAUD_RATE_DIV_MASK; in zynqmp_qspi_init_hw()
392 config_reg |= GQSPI_CFG_CLK_PHA_MASK; in zynqmp_qspi_init_hw()
394 config_reg &= ~GQSPI_CFG_CLK_PHA_MASK; in zynqmp_qspi_init_hw()
[all …]
/linux/drivers/clk/qcom/
H A Dhfpll.c23 .config_reg = 0x14,
41 .config_reg = 0x14,
58 .config_reg = 0x14,
75 .config_reg = 0x14,
H A Dclk-pll.c103 regmap_read(pll->clkr.regmap, pll->config_reg, &config); in clk_pll_recalc_rate()
162 regmap_write(pll->clkr.regmap, pll->config_reg, f->ibits); in clk_pll_set_rate()
242 regmap_update_bits(regmap, pll->config_reg, mask, val); in clk_pll_configure()
H A Dclk-hfpll.h17 u32 config_reg; member
H A Dclk-pll.h43 u32 config_reg; member
H A Dgcc-ipq806x.c36 .config_reg = 0x30d4,
65 .config_reg = 0x3174,
94 .config_reg = 0x3154,
124 .config_reg = 0x3204,
150 .config_reg = 0x3244,
176 .config_reg = 0x3304,
201 .config_reg = 0x31d4,
246 .config_reg = 0x31b4,
265 .config_reg = 0x3194,
H A Da53-pll.c112 pll->config_reg = 0x14; in qcom_a53pll_probe()
H A Dgcc-msm8939.c56 .config_reg = 0x21010,
87 .config_reg = 0x20010,
118 .config_reg = 0x4a010,
149 .config_reg = 0x23010,
180 .config_reg = 0x22010,
227 .config_reg = 0x24010,
273 .config_reg = 0x25010,
304 .config_reg = 0x37010,
H A Dclk-hfpll.c31 regmap_write(regmap, hd->config_reg, hd->config_val); in __clk_hfpll_init_once()
H A Dlcc-ipq806x.c30 .config_reg = 0x14,
H A Dgcc-mdm9615.c51 .config_reg = 0x30d4,
93 .config_reg = 0x3154,
122 .config_reg = 0x31d4,
H A Dlcc-msm8960.c33 .config_reg = 0x14,
H A Dgcc-msm8976.c59 .config_reg = 0x21014,
92 .config_reg = 0x4a014,
128 .config_reg = 0x22010,
176 .config_reg = 0x24018,
208 .config_reg = 0x37014,
H A Dgcc-msm8916.c48 .config_reg = 0x21010,
79 .config_reg = 0x20010,
110 .config_reg = 0x4a010,
141 .config_reg = 0x23010,
H A Dgcc-apq8084.c42 .config_reg = 0x0014,
73 .config_reg = 0x0054,
104 .config_reg = 0x1dd4,
H A Dgcc-msm8660.c30 .config_reg = 0x3154,
/linux/drivers/input/misc/
H A Dmax77693-haptic.c110 unsigned int value, config_reg; in max77693_haptic_configure() local
119 config_reg = MAX77693_HAPTIC_REG_CONFIG2; in max77693_haptic_configure()
126 config_reg = MAX77705_PMIC_REG_MCONFIG; in max77693_haptic_configure()
132 config_reg = MAX77843_HAP_REG_MCONFIG; in max77693_haptic_configure()
139 config_reg, value); in max77693_haptic_configure()
/linux/drivers/pinctrl/renesas/
H A Dcore.c252 const struct pinmux_cfg_reg *config_reg = in sh_pfc_get_config_reg() local
254 unsigned int r_width = config_reg->reg_width; in sh_pfc_get_config_reg()
255 unsigned int f_width = config_reg->field_width; in sh_pfc_get_config_reg()
271 curr_width = abs(config_reg->var_field_width[m]); in sh_pfc_get_config_reg()
272 if (config_reg->var_field_width[m] < 0) in sh_pfc_get_config_reg()
278 if (config_reg->enum_ids[pos + n] == enum_id) { in sh_pfc_get_config_reg()
279 *crp = config_reg; in sh_pfc_get_config_reg()
/linux/drivers/i2c/busses/
H A Di2c-mlxbf.c1386 u32 config_reg; in mlxbf_i2c_init_master() local
1423 config_reg = readl(gpio_res->io + MLXBF_I2C_GPIO_0_FUNC_EN_0); in mlxbf_i2c_init_master()
1424 config_reg = MLXBF_I2C_GPIO_SMBUS_GW_ASSERT_PINS(priv->bus, in mlxbf_i2c_init_master()
1425 config_reg); in mlxbf_i2c_init_master()
1426 writel(config_reg, gpio_res->io + MLXBF_I2C_GPIO_0_FUNC_EN_0); in mlxbf_i2c_init_master()
1428 config_reg = readl(gpio_res->io + MLXBF_I2C_GPIO_0_FORCE_OE_EN); in mlxbf_i2c_init_master()
1429 config_reg = MLXBF_I2C_GPIO_SMBUS_GW_RESET_PINS(priv->bus, in mlxbf_i2c_init_master()
1430 config_reg); in mlxbf_i2c_init_master()
1431 writel(config_reg, gpio_res->io + MLXBF_I2C_GPIO_0_FORCE_OE_EN); in mlxbf_i2c_init_master()
/linux/drivers/usb/host/
H A Dxhci.c482 u32 config_reg; in xhci_enable_max_dev_slots() local
487 config_reg = readl(&xhci->op_regs->config_reg); in xhci_enable_max_dev_slots()
488 config_reg &= ~HCS_SLOTS_MASK; in xhci_enable_max_dev_slots()
489 config_reg |= xhci->max_slots; in xhci_enable_max_dev_slots()
492 config_reg); in xhci_enable_max_dev_slots()
493 writel(config_reg, &xhci->op_regs->config_reg); in xhci_enable_max_dev_slots()
812 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg); in xhci_save_registers()
837 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg); in xhci_restore_registers()
H A Dxhci.h115 __le32 config_reg; member
1424 u32 config_reg; member
/linux/drivers/usb/cdns3/
H A Dcdnsp-mem.c1223 val = readl(&pdev->op_regs->config_reg); in cdnsp_mem_init()
1225 writel(val, &pdev->op_regs->config_reg); in cdnsp_mem_init()
H A Dcdnsp-gadget.h126 __le32 config_reg; member
/linux/drivers/scsi/
H A Dqla1280.c3857 uint16_t config_reg, scsi_control; in qla1280_check_for_dead_scsi_bus() local
3862 config_reg = RD_REG_WORD(&reg->cfg_1); in qla1280_check_for_dead_scsi_bus()
3865 WRT_REG_WORD(&reg->cfg_1, config_reg); in qla1280_check_for_dead_scsi_bus()

12