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Searched refs:config_base (Results 1 – 25 of 42) sorted by relevance

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/linux/arch/arm/mach-bcm/
H A Dbcm63xx_smp.c37 unsigned long config_base; in scu_a9_enable() local
47 config_base = scu_a9_get_base(); in scu_a9_enable()
48 if (!config_base) { in scu_a9_enable()
53 scu_base = ioremap((phys_addr_t)config_base, CORTEX_A9_SCU_SIZE); in scu_a9_enable()
56 config_base, CORTEX_A9_SCU_SIZE); in scu_a9_enable()
H A Dplatsmp.c49 unsigned long config_base; in scu_a9_enable() local
58 config_base = scu_a9_get_base(); in scu_a9_enable()
59 if (!config_base) { in scu_a9_enable()
64 scu_base = ioremap((phys_addr_t)config_base, CORTEX_A9_SCU_SIZE); in scu_a9_enable()
67 config_base, CORTEX_A9_SCU_SIZE); in scu_a9_enable()
/linux/drivers/pci/controller/dwc/
H A Dpcie-tegra194-acpi.c17 void __iomem *config_base; member
31 pcie_ecam->config_base = cfg->win; in tegra194_acpi_init()
99 return pcie_ecam->config_base + where; in tegra194_map_bus()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_pmu.c219 hwc->config_base = AMDGPU_PMU_PERF_TYPE_NONE; in amdgpu_perf_event_init()
243 switch (hwc->config_base) { in amdgpu_perf_start()
281 switch (hwc->config_base) { in amdgpu_perf_read()
311 switch (hwc->config_base) { in amdgpu_perf_stop()
346 hwc->config_base = AMDGPU_PMU_EVENT_CONFIG_TYPE_DF; in amdgpu_perf_add()
349 hwc->config_base = (hwc->config >> in amdgpu_perf_add()
357 switch (hwc->config_base) { in amdgpu_perf_add()
395 switch (hwc->config_base) { in amdgpu_perf_del()
/linux/drivers/perf/
H A Dthunderx2_pmu.c332 hwc->config_base = (unsigned long)tx2_pmu->base in init_cntr_base_l3c()
347 hwc->config_base = (unsigned long)tx2_pmu->base in init_cntr_base_dmc()
362 hwc->config_base = (unsigned long)tx2_pmu->base in init_cntr_base_ccpi2()
378 reg_writel(val, hwc->config_base); in uncore_start_event_l3c()
385 reg_writel(0, event->hw.config_base); in uncore_stop_event_l3c()
405 val = reg_readl(hwc->config_base); in uncore_start_event_dmc()
408 reg_writel(val, hwc->config_base); in uncore_start_event_dmc()
425 val = reg_readl(hwc->config_base); in uncore_stop_event_dmc()
427 reg_writel(val, hwc->config_base); in uncore_stop_event_dmc()
445 GET_EVENTID(event, emask)), hwc->config_base); in uncore_start_event_ccpi2()
H A Dqcom_l2_pmu.c347 if (hwc->config_base == L2CYCLE_CTR_RAW_CODE) { in l2_cache_get_event_idx()
364 group = L2_EVT_GROUP(hwc->config_base); in l2_cache_get_event_idx()
381 if (hwc->config_base != L2CYCLE_CTR_RAW_CODE) in l2_cache_clear_event_idx()
382 clear_bit(L2_EVT_GROUP(hwc->config_base), cluster->used_groups); in l2_cache_clear_event_idx()
530 hwc->config_base = event->attr.config; in l2_cache_event_init()
555 if (hwc->config_base == L2CYCLE_CTR_RAW_CODE) { in l2_cache_event_start()
558 config = hwc->config_base; in l2_cache_event_start()
H A Darm-ccn.c672 hw->config_base = bit; in arm_ccn_pmu_event_alloc()
693 clear_bit(hw->config_base, source->xp.dt_cmp_mask); in arm_ccn_pmu_event_release()
695 clear_bit(hw->config_base, source->pmu_events_mask); in arm_ccn_pmu_event_release()
939 unsigned long wp = hw->config_base; in arm_ccn_pmu_xp_watchpoint_config()
989 hw->event_base = CCN_XP_DT_CONFIG__DT_CFG__XP_PMU_EVENT(hw->config_base); in arm_ccn_pmu_xp_event_config()
997 CCN_XP_PMU_EVENT_SEL__ID__SHIFT(hw->config_base)); in arm_ccn_pmu_xp_event_config()
998 val |= id << CCN_XP_PMU_EVENT_SEL__ID__SHIFT(hw->config_base); in arm_ccn_pmu_xp_event_config()
1013 hw->config_base); in arm_ccn_pmu_node_event_config()
1033 CCN_HNF_PMU_EVENT_SEL__ID__SHIFT(hw->config_base)); in arm_ccn_pmu_node_event_config()
1035 CCN_HNF_PMU_EVENT_SEL__ID__SHIFT(hw->config_base); in arm_ccn_pmu_node_event_config()
H A Darm-cci.c789 unsigned long cci_event = event->hw.config_base; in pmu_get_event_idx()
960 pmu_set_event(cci_pmu, i, event->hw.config_base); in cci5xx_pmu_write_counters()
1145 pmu_set_event(cci_pmu, idx, hwc->config_base); in cci_pmu_start()
1286 hwc->config_base = 0; in __hw_perf_event_init()
1293 hwc->config_base |= (unsigned long)mapping; in __hw_perf_event_init()
H A Darm_dsu_pmu.c323 __dsu_pmu_set_event(idx, event->hw.config_base); in dsu_pmu_set_event()
566 event->hw.config_base = event->attr.config; in dsu_pmu_event_init()
H A Darm_pmu.c479 hwc->config_base = 0; in __hw_perf_event_init()
495 hwc->config_base |= (unsigned long)mapping; in __hw_perf_event_init()
/linux/arch/loongarch/kernel/
H A Dperf_event.c275 (evt->config_base & M_PERFCTL_CONFIG_MASK) | CSR_PERFCTRL_IE; in loongarch_pmu_enable_event()
784 hwc->config_base = CSR_PERFCTRL_IE; in __hw_perf_event_init()
791 hwc->config_base |= CSR_PERFCTRL_PLV3; in __hw_perf_event_init()
792 hwc->config_base |= CSR_PERFCTRL_PLV2; in __hw_perf_event_init()
795 hwc->config_base |= CSR_PERFCTRL_PLV0; in __hw_perf_event_init()
798 hwc->config_base |= CSR_PERFCTRL_PLV1; in __hw_perf_event_init()
801 hwc->config_base &= M_PERFCTL_CONFIG_MASK; in __hw_perf_event_init()
/linux/drivers/pci/controller/
H A Dpci-v3-semi.c239 void __iomem *config_base; member
378 return v3->config_base + address + offset; in v3_map_bus()
757 v3->config_base = devm_ioremap_resource(dev, regs); in v3_pci_probe()
758 if (IS_ERR(v3->config_base)) in v3_pci_probe()
759 return PTR_ERR(v3->config_base); in v3_pci_probe()
/linux/drivers/media/dvb-core/
H A Ddvb_ca_en50221.c94 u32 config_base; member
523 sl->config_base = 0; in dvb_ca_en50221_parse_attributes()
525 sl->config_base |= (tuple[2 + i] << (8 * i)); in dvb_ca_en50221_parse_attributes()
589 manfid, devid, sl->config_base, sl->config_option); in dvb_ca_en50221_parse_attributes()
609 ca->pub->write_attribute_mem(ca->pub, slot, sl->config_base, in dvb_ca_en50221_set_configoption()
614 sl->config_base); in dvb_ca_en50221_set_configoption()
/linux/tools/perf/
H A Dbuiltin-daemon.c88 char *config_base; member
978 zfree(&daemon->config_base); in daemon__exit()
1037 daemon->config_base = strdup(base); in setup_config_changes()
1038 if (!daemon->config_base) { in setup_config_changes()
1065 if (!strcmp(event->name, daemon->config_base)) in process_inotify_event()
/linux/arch/arm/mm/
H A Dcache-l2x0-pmu.c200 __l2x0_pmu_event_enable(hw->idx, hw->config_base); in l2x0_pmu_event_start()
311 hw->config_base = event->attr.config; in l2x0_pmu_event_init()
/linux/arch/sparc/kernel/
H A Dperf_event.c977 cpuc->pcr[0] |= cpuc->event[0]->hw.config_base; in calculate_single_pcr()
1010 cpuc->pcr[idx] |= cp->hw.config_base; in calculate_multiple_pcrs()
1465 hwc->config_base = sparc_pmu->irq_bit; in sparc_pmu_event_init()
1467 hwc->config_base |= sparc_pmu->user_bit; in sparc_pmu_event_init()
1469 hwc->config_base |= sparc_pmu->priv_bit; in sparc_pmu_event_init()
1471 hwc->config_base |= sparc_pmu->hv_bit; in sparc_pmu_event_init()
/linux/drivers/perf/hisilicon/
H A Dhisi_uncore_pmu.h47 #define HISI_GET_EVENTID(ev) ((ev)->hw.config_base & HISI_EVENTID_MASK)
/linux/include/pcmcia/
H A Dds.h111 unsigned int config_base; member
/linux/drivers/fpga/
H A Ddfl-fme-perf.c792 ops->event_destroy(priv, event->hw.idx, event->hw.config_base); in fme_perf_event_destroy()
828 hwc->config_base = portid; in fme_perf_event_init()
849 now = ops->read_counter(priv, (u32)hwc->idx, hwc->config_base); in fme_perf_event_update()
863 count = ops->read_counter(priv, (u32)hwc->idx, hwc->config_base); in fme_perf_event_start()
/linux/drivers/pci/controller/plda/
H A Dpcie-plda.h184 void __iomem *config_base; member
/linux/arch/x86/events/amd/
H A Duncore.c178 wrmsrq(hwc->config_base, (hwc->config | ARCH_PERFMON_EVENTSEL_ENABLE)); in amd_uncore_start()
188 wrmsrq(hwc->config_base, hwc->config); in amd_uncore_stop()
235 hwc->config_base = pmu->msr_base + (2 * hwc->idx); in amd_uncore_add()
984 wrmsrq(hwc->config_base, (hwc->config | AMD64_PERFMON_V2_ENABLE_UMC)); in amd_uncore_umc_start()
/linux/drivers/pcmcia/
H A Dpcmcia_resource.c177 addr = (p_dev->config_base + where) >> 1; in pcmcia_access_config()
535 p_dev->vpp, flags, p_dev->config_base, p_dev->config_regs, in pcmcia_enable_device()
539 base = p_dev->config_base; in pcmcia_enable_device()
/linux/drivers/mfd/
H A Dqcom-pm8008.c154 .config_base = pm8008_config_regs,
H A Dwcd934x.c70 .config_base = wcd934x_config_regs,
/linux/drivers/net/can/sja1000/
H A Dems_pcmcia.c283 csval = pcmcia_map_mem_page(dev, dev->resource[2], dev->config_base); in ems_pcmcia_probe()

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