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Searched refs:config_base (Results 1 – 25 of 54) sorted by relevance

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/linux/drivers/perf/
H A Darm_v7_pmu.c876 armv7_pmnc_write_evtsel(idx, hwc->config_base); in armv7pmu_enable_event()
995 unsigned long evtype = hwc->config_base & ARMV7_EVTYPE_EVENT; in armv7pmu_get_event_idx()
1030 unsigned long config_base = 0; in armv7pmu_set_event_filter() local
1037 config_base |= ARMV7_EXCLUDE_USER; in armv7pmu_set_event_filter()
1039 config_base |= ARMV7_EXCLUDE_PL1; in armv7pmu_set_event_filter()
1041 config_base |= ARMV7_INCLUDE_HYP; in armv7pmu_set_event_filter()
1047 event->config_base = config_base; in armv7pmu_set_event_filter()
1376 static void krait_evt_setup(int idx, u32 config_base) in krait_evt_setup() argument
1381 unsigned int region = EVENT_REGION(config_base); in krait_evt_setup()
1382 unsigned int group = EVENT_GROUP(config_base); in krait_evt_setup()
[all …]
H A Dapple_m1_cpu_pmu.c393 evt = event->hw.config_base & M1_PMU_CFG_EVENT; in m1_pmu_enable_event()
394 user = event->hw.config_base & M1_PMU_CFG_COUNT_USER; in m1_pmu_enable_event()
395 kernel = event->hw.config_base & M1_PMU_CFG_COUNT_KERNEL; in m1_pmu_enable_event()
470 unsigned long evtype = event->hw.config_base & M1_PMU_CFG_EVENT; in m1_pmu_get_event_idx()
557 unsigned long config_base = 0; in m1_pmu_set_event_filter() local
564 config_base |= M1_PMU_CFG_COUNT_KERNEL; in m1_pmu_set_event_filter()
566 config_base |= M1_PMU_CFG_COUNT_USER; in m1_pmu_set_event_filter()
568 event->config_base = config_base; in m1_pmu_set_event_filter()
H A Darm_xscale_pmu.c217 evt = (hwc->config_base << XSCALE1_COUNT0_EVT_SHFT) | in xscale1pmu_enable_event()
222 evt = (hwc->config_base << XSCALE1_COUNT1_EVT_SHFT) | in xscale1pmu_enable_event()
271 if (XSCALE_PERFCTR_CCNT == hwc->config_base) { in xscale1pmu_get_event_idx()
553 evtsel |= hwc->config_base << XSCALE2_COUNT0_EVT_SHFT; in xscale2pmu_enable_event()
558 evtsel |= hwc->config_base << XSCALE2_COUNT1_EVT_SHFT; in xscale2pmu_enable_event()
563 evtsel |= hwc->config_base << XSCALE2_COUNT2_EVT_SHFT; in xscale2pmu_enable_event()
568 evtsel |= hwc->config_base << XSCALE2_COUNT3_EVT_SHFT; in xscale2pmu_enable_event()
H A Darm_pmuv3.c643 armv8pmu_write_evtype(idx - 1, hwc->config_base); in armv8pmu_write_event_type()
647 write_pmccfiltr(hwc->config_base); in armv8pmu_write_event_type()
649 write_pmicfiltr(hwc->config_base); in armv8pmu_write_event_type()
651 armv8pmu_write_evtype(idx, hwc->config_base); in armv8pmu_write_event_type()
943 unsigned long evtype = hwc->config_base & ARMV8_PMU_EVTYPE_EVENT; in armv8pmu_get_event_idx()
1002 unsigned long config_base = 0; in armv8pmu_set_event_filter() local
1021 config_base |= ARMV8_PMU_INCLUDE_EL2; in armv8pmu_set_event_filter()
1023 config_base |= ARMV8_PMU_EXCLUDE_EL1; in armv8pmu_set_event_filter()
1025 config_base |= ARMV8_PMU_EXCLUDE_EL0; in armv8pmu_set_event_filter()
1028 config_base |= ARMV8_PMU_INCLUDE_EL2; in armv8pmu_set_event_filter()
[all …]
H A Darm_v6_pmu.c216 evt = (hwc->config_base << ARMV6_PMCR_EVT_COUNT0_SHIFT) | in armv6pmu_enable_event()
220 evt = (hwc->config_base << ARMV6_PMCR_EVT_COUNT1_SHIFT) | in armv6pmu_enable_event()
319 if (ARMV6_PERFCTR_CPU_CYCLES == hwc->config_base) { in armv6pmu_get_event_idx()
/linux/arch/arm/mach-bcm/
H A Dbcm63xx_smp.c37 unsigned long config_base; in scu_a9_enable() local
47 config_base = scu_a9_get_base(); in scu_a9_enable()
48 if (!config_base) { in scu_a9_enable()
53 scu_base = ioremap((phys_addr_t)config_base, CORTEX_A9_SCU_SIZE); in scu_a9_enable()
56 config_base, CORTEX_A9_SCU_SIZE); in scu_a9_enable()
H A Dplatsmp.c49 unsigned long config_base; in scu_a9_enable() local
58 config_base = scu_a9_get_base(); in scu_a9_enable()
59 if (!config_base) { in scu_a9_enable()
64 scu_base = ioremap((phys_addr_t)config_base, CORTEX_A9_SCU_SIZE); in scu_a9_enable()
67 config_base, CORTEX_A9_SCU_SIZE); in scu_a9_enable()
/linux/arch/x86/events/intel/
H A Duncore_discovery.c462 wrmsrl(hwc->config_base, hwc->config); in intel_generic_uncore_msr_enable_event()
470 wrmsrl(hwc->config_base, 0); in intel_generic_uncore_msr_disable_event()
492 hwc->config_base = uncore_pci_event_ctl(box, hwc->idx); in intel_generic_uncore_assign_hw_event()
503 hwc->config_base = box_ctl + uncore_pci_event_ctl(box, hwc->idx); in intel_generic_uncore_assign_hw_event()
508 hwc->config_base = box_ctl + box->pmu->type->event_ctl + hwc->idx; in intel_generic_uncore_assign_hw_event()
550 pci_write_config_dword(pdev, hwc->config_base, hwc->config); in intel_generic_uncore_pci_enable_event()
559 pci_write_config_dword(pdev, hwc->config_base, 0); in intel_generic_uncore_pci_disable_event()
640 writel(hwc->config, box->io_addr + hwc->config_base); in intel_generic_uncore_mmio_enable_event()
651 writel(0, box->io_addr + hwc->config_base); in intel_generic_uncore_mmio_disable_event()
H A Dp6.c164 (void)wrmsrl_safe(hwc->config_base, val); in p6_pmu_disable_event()
181 (void)wrmsrl_safe(hwc->config_base, val); in p6_pmu_enable_event()
H A Duncore_nhmex.c243 wrmsrl(event->hw.config_base, 0); in nhmex_uncore_msr_disable_event()
251 wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0); in nhmex_uncore_msr_enable_event()
253 wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT22); in nhmex_uncore_msr_enable_event()
255 wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT0); in nhmex_uncore_msr_enable_event()
388 wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0 | in nhmex_bbox_msr_enable_event()
475 wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT22); in nhmex_sbox_msr_enable_event()
863 wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT0); in nhmex_mbox_msr_enable_event()
1148 wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0 | in nhmex_rbox_msr_enable_event()
H A Dknc.c185 (void)wrmsrl_safe(hwc->config_base + hwc->idx, val); in knc_pmu_disable_event()
196 (void)wrmsrl_safe(hwc->config_base + hwc->idx, val); in knc_pmu_enable_event()
H A Duncore_snbep.c583 pci_write_config_dword(pdev, hwc->config_base, hwc->config | SNBEP_PMON_CTL_EN); in snbep_uncore_pci_enable_event()
591 pci_write_config_dword(pdev, hwc->config_base, hwc->config); in snbep_uncore_pci_disable_event()
648 wrmsrl(hwc->config_base, hwc->config | SNBEP_PMON_CTL_EN); in snbep_uncore_msr_enable_event()
656 wrmsrl(hwc->config_base, hwc->config); in snbep_uncore_msr_disable_event()
1229 pci_write_config_dword(pdev, hwc->config_base, hwc->config | SNBEP_PMON_CTL_EN); in snbep_qpi_enable_event()
1790 wrmsrl(hwc->config_base, hwc->config | SNBEP_PMON_CTL_EN); in ivbep_cbox_enable_event()
2301 pci_write_config_dword(pdev, hwc->config_base, in knl_uncore_imc_enable_event()
2304 pci_write_config_dword(pdev, hwc->config_base, in knl_uncore_imc_enable_event()
2774 wrmsrl(hwc->config_base, hwc->config | SNBEP_PMON_CTL_EN); in hswep_cbox_enable_event()
3711 wrmsrl(hwc->config_base, hwc->config | SNBEP_PMON_CTL_EN); in skx_iio_enable_event()
[all …]
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_pmu.c219 hwc->config_base = AMDGPU_PMU_PERF_TYPE_NONE; in amdgpu_perf_event_init()
243 switch (hwc->config_base) { in amdgpu_perf_start()
281 switch (hwc->config_base) { in amdgpu_perf_read()
311 switch (hwc->config_base) { in amdgpu_perf_stop()
346 hwc->config_base = AMDGPU_PMU_EVENT_CONFIG_TYPE_DF; in amdgpu_perf_add()
349 hwc->config_base = (hwc->config >> in amdgpu_perf_add()
357 switch (hwc->config_base) { in amdgpu_perf_add()
395 switch (hwc->config_base) { in amdgpu_perf_del()
/linux/drivers/pci/controller/dwc/
H A Dpcie-tegra194-acpi.c17 void __iomem *config_base; member
31 pcie_ecam->config_base = cfg->win; in tegra194_acpi_init()
99 return pcie_ecam->config_base + where; in tegra194_map_bus()
/linux/arch/x86/events/zhaoxin/
H A Dcore.c296 rdmsrl(hwc->config_base, ctrl_val); in zhaoxin_pmu_disable_fixed()
298 wrmsrl(hwc->config_base, ctrl_val); in zhaoxin_pmu_disable_fixed()
305 if (unlikely(hwc->config_base == MSR_ARCH_PERFMON_FIXED_CTR_CTRL)) { in zhaoxin_pmu_disable_event()
332 rdmsrl(hwc->config_base, ctrl_val); in zhaoxin_pmu_enable_fixed()
335 wrmsrl(hwc->config_base, ctrl_val); in zhaoxin_pmu_enable_fixed()
342 if (unlikely(hwc->config_base == MSR_ARCH_PERFMON_FIXED_CTR_CTRL)) { in zhaoxin_pmu_enable_event()
/linux/arch/loongarch/kernel/
H A Dperf_event.c275 (evt->config_base & M_PERFCTL_CONFIG_MASK) | CSR_PERFCTRL_IE; in loongarch_pmu_enable_event()
770 hwc->config_base = CSR_PERFCTRL_IE; in __hw_perf_event_init()
777 hwc->config_base |= CSR_PERFCTRL_PLV3; in __hw_perf_event_init()
778 hwc->config_base |= CSR_PERFCTRL_PLV2; in __hw_perf_event_init()
781 hwc->config_base |= CSR_PERFCTRL_PLV0; in __hw_perf_event_init()
784 hwc->config_base |= CSR_PERFCTRL_PLV1; in __hw_perf_event_init()
787 hwc->config_base &= M_PERFCTL_CONFIG_MASK; in __hw_perf_event_init()
/linux/arch/s390/kernel/
H A Dperf_cpum_cf.c815 hwc->config_base = cpumf_ctr_ctl[set]; in __hw_perf_event_init()
833 if (!(hwc->config_base & cpumf_ctr_info.auth_ctl)) in __hw_perf_event_init()
937 ctr_set_enable(&cpuhw->state, hwc->config_base); in cpumf_pmu_start()
938 ctr_set_start(&cpuhw->state, hwc->config_base); in cpumf_pmu_start()
948 hwc->config_base, true); in cpumf_pmu_start()
955 if ((hwc->config_base & cpumf_ctr_ctl[i])) in cpumf_pmu_start()
1007 if (!(hwc->config_base & cpumf_ctr_ctl[i])) in cpumf_pmu_stop()
1020 event->hw.config_base, in cpumf_pmu_stop()
1022 if (cfdiag_diffctr(cpuhw, event->hw.config_base)) in cpumf_pmu_stop()
1035 ctr_set_enable(&cpuhw->state, event->hw.config_base); in cpumf_pmu_add()
[all …]
/linux/arch/x86/events/amd/
H A Dibs.c328 hwc->config_base = perf_ibs->msr; in perf_ibs_init()
386 rdmsrl(event->hw.config_base, *config); in perf_ibs_event_update()
397 wrmsrl(hwc->config_base, tmp & ~perf_ibs->enable_mask); in perf_ibs_enable_event()
399 wrmsrl(hwc->config_base, tmp | perf_ibs->enable_mask); in perf_ibs_enable_event()
414 wrmsrl(hwc->config_base, config); in perf_ibs_disable_event()
416 wrmsrl(hwc->config_base, config); in perf_ibs_disable_event()
472 rdmsrl(hwc->config_base, config); in perf_ibs_stop()
1053 msr = hwc->config_base; in perf_ibs_handle_irq()
/linux/arch/powerpc/perf/
H A Dcore-fsl-emb.c327 write_pmlca(i, event->hw.config_base); in fsl_emb_pmu_add()
536 event->hw.config_base = PMLCA_CE | PMLCA_FCM1 | in fsl_emb_pmu_event_init()
540 event->hw.config_base |= PMLCA_FCU; in fsl_emb_pmu_event_init()
542 event->hw.config_base |= PMLCA_FCS; in fsl_emb_pmu_event_init()
/linux/drivers/pci/controller/
H A Dpci-v3-semi.c239 void __iomem *config_base; member
378 return v3->config_base + address + offset; in v3_map_bus()
757 v3->config_base = devm_ioremap_resource(dev, regs); in v3_pci_probe()
758 if (IS_ERR(v3->config_base)) in v3_pci_probe()
759 return PTR_ERR(v3->config_base); in v3_pci_probe()
/linux/arch/alpha/kernel/
H A Dperf_event.c200 event[0]->hw.config_base = config; in ev67_check_constraints()
203 event[1]->hw.config_base = config; in ev67_check_constraints()
424 cpuc->config = cpuc->event[0]->hw.config_base; in maybe_change_configuration()
663 hwc->config_base = 0; in __hw_perf_event_init()
/linux/drivers/pci/controller/plda/
H A Dpcie-plda-host.c24 return pcie->config_base + PCIE_ECAM_OFFSET(bus->number, devfn, where); in plda_pcie_map_bus()
587 port->config_base = devm_ioremap_resource(dev, cfg_res); in plda_pcie_host_init()
588 if (IS_ERR(port->config_base)) in plda_pcie_host_init()
589 return dev_err_probe(dev, PTR_ERR(port->config_base), in plda_pcie_host_init()
/linux/arch/mips/kernel/
H A Dperf_event_mipsxx.c358 (evt->config_base & M_PERFCTL_CONFIG_MASK) | in mipsxx_pmu_enable_event()
363 (evt->config_base & M_PERFCTL_CONFIG_MASK) | in mipsxx_pmu_enable_event()
1504 hwc->config_base = MIPS_PERFCTRL_IE; in __hw_perf_event_init()
1511 hwc->config_base |= MIPS_PERFCTRL_U; in __hw_perf_event_init()
1513 hwc->config_base |= MIPS_PERFCTRL_K; in __hw_perf_event_init()
1515 hwc->config_base |= MIPS_PERFCTRL_EXL; in __hw_perf_event_init()
1518 hwc->config_base |= MIPS_PERFCTRL_S; in __hw_perf_event_init()
1520 hwc->config_base &= M_PERFCTL_CONFIG_MASK; in __hw_perf_event_init()
/linux/drivers/media/dvb-core/
H A Ddvb_ca_en50221.c94 u32 config_base; member
523 sl->config_base = 0; in dvb_ca_en50221_parse_attributes()
525 sl->config_base |= (tuple[2 + i] << (8 * i)); in dvb_ca_en50221_parse_attributes()
589 manfid, devid, sl->config_base, sl->config_option); in dvb_ca_en50221_parse_attributes()
609 ca->pub->write_attribute_mem(ca->pub, slot, sl->config_base, in dvb_ca_en50221_set_configoption()
614 sl->config_base); in dvb_ca_en50221_set_configoption()
/linux/tools/perf/
H A Dbuiltin-daemon.c88 char *config_base; member
980 zfree(&daemon->config_base); in daemon__exit()
1039 daemon->config_base = strdup(base); in setup_config_changes()
1040 if (!daemon->config_base) { in setup_config_changes()
1067 if (!strcmp(event->name, daemon->config_base)) in process_inotify_event()

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