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Searched refs:compression_enable (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dintel_vdsc.c378 crtc_state->dsc.compression_enable = true; in intel_dsc_enable_on_crtc()
385 drm_WARN_ON(display->drm, crtc_state->dsc.compression_enable && in intel_dsc_enabled_on_link()
736 if (!crtc_state->dsc.compression_enable) in intel_dsc_dsi_pps_write()
756 if (!crtc_state->dsc.compression_enable) in intel_dsc_dp_pps_write()
811 if (crtc_state->joiner_pipes && !crtc_state->dsc.compression_enable) { in intel_uncompressed_joiner_enable()
830 if (!crtc_state->dsc.compression_enable) in intel_dsc_enable()
868 if (old_crtc_state->dsc.compression_enable || in intel_dsc_disable()
1040 crtc_state->dsc.compression_enable = dss_ctl2 & VDSC0_ENABLE; in intel_dsc_get_config()
1041 if (!crtc_state->dsc.compression_enable) in intel_dsc_get_config()
1069 if (!crtc_state->dsc.compression_enable) in intel_vdsc_state_dump()
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H A Dicl_dsi.c351 if (crtc_state->dsc.compression_enable) in afe_clk()
747 if (pipe_config->dsc.compression_enable) { in gen11_dsi_configure_transcoder()
892 if (crtc_state->dsc.compression_enable) { in gen11_dsi_set_transcoder_timings()
916 if (crtc_state->dsc.compression_enable) in gen11_dsi_set_transcoder_timings()
1768 if (crtc_state->dsc.compression_enable) { in gen11_dsi_initial_fastset_check()
H A Dintel_dp.c2744 int link_bpp_x16 = crtc_state->dsc.compression_enable ? in intel_dp_config_required_rate()
3306 if (crtc_state->dsc.compression_enable) { in intel_dp_compute_min_hblank()
3317 if (crtc_state->dsc.compression_enable) in intel_dp_compute_min_hblank()
3354 (crtc_state->dsc.compression_enable && in intel_dp_compute_min_hblank()
3428 if (pipe_config->dsc.compression_enable) in intel_dp_compute_config()
3679 if (!new_crtc_state->dsc.compression_enable) in intel_dp_sink_enable_decompression()
3710 if (!old_crtc_state->dsc.compression_enable) in intel_dp_sink_disable_decompression()
3885 if (crtc_state->dsc.compression_enable) { in intel_dp_initial_fastset_check()
6325 if (crtc_state && crtc_state->dsc.compression_enable) { in intel_dp_connector_sync_state()
7133 crtc_state->dsc.compression_enable) in intel_dp_sdp_min_guardband()
H A Dintel_psr.c1345 if (crtc_state->dsc.compression_enable && in psr2_granularity_check()
1574 if (crtc_state->dsc.compression_enable && in intel_psr2_config_valid()
2624 if (!crtc_state->dsc.compression_enable) in intel_psr2_program_trans_man_trk_ctl()
2707 if (crtc_state->dsc.compression_enable && in intel_psr2_sel_fetch_pipe_alignment()
H A Dintel_dp_mst.c2019 if (old_crtc_state->dsc.compression_enable == in intel_dp_mst_crtc_needs_modeset()
2020 new_crtc_state->dsc.compression_enable) in intel_dp_mst_crtc_needs_modeset()
H A Dintel_display_types.h1336 bool compression_enable; member
H A Dintel_display.c482 new_crtc_state->dsc.compression_enable) { in intel_enable_transcoder()
536 old_crtc_state->dsc.compression_enable) in intel_disable_transcoder()
1980 if (crtc_state->dsc.compression_enable) in get_crtc_power_domains()
5460 PIPE_CONF_CHECK_BOOL(dsc.compression_enable); in intel_pipe_config_compare()
H A Dintel_bios.c2159 if (!child->compression_enable) in parse_compression_parameters()