Searched refs:component_reg_phys (Results 1 – 4 of 4) sorted by relevance
745 port->component_reg_phys = CXL_RESOURCE_NONE; in cxl_port_alloc()757 resource_size_t component_reg_phys) in cxl_setup_comp_regs() argument762 .resource = component_reg_phys, in cxl_setup_comp_regs()765 if (component_reg_phys == CXL_RESOURCE_NONE) in cxl_setup_comp_regs()775 resource_size_t component_reg_phys) in cxl_port_setup_regs() argument780 component_reg_phys); in cxl_port_setup_regs()785 resource_size_t component_reg_phys) in cxl_dport_setup_regs() argument798 component_reg_phys); in cxl_dport_setup_regs()840 resource_size_t component_reg_phys, in cxl_port_add() argument867 port->component_reg_phys = component_reg_phys; in cxl_port_add()[all …]
581 resource_size_t component_reg_phys; in __rcrb_to_component() local624 component_reg_phys = bar0 & PCI_BASE_ADDRESS_MEM_MASK; in __rcrb_to_component()626 component_reg_phys |= ((u64)bar1) << 32; in __rcrb_to_component()628 if (!component_reg_phys) in __rcrb_to_component()632 if (!IS_ALIGNED(component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE)) in __rcrb_to_component()635 return component_reg_phys; in __rcrb_to_component()
704 resource_size_t component_reg_phys; in cxl_rcrb_get_comp_regs() local711 component_reg_phys = cxl_rcd_component_reg_phys(&pdev->dev, dport); in cxl_rcrb_get_comp_regs()712 if (component_reg_phys == CXL_RESOURCE_NONE) in cxl_rcrb_get_comp_regs()715 map->resource = component_reg_phys; in cxl_rcrb_get_comp_regs()
594 resource_size_t component_reg_phys; member734 resource_size_t component_reg_phys,758 resource_size_t component_reg_phys);811 resource_size_t component_reg_phys);