Searched refs:cmrr (Results 1 – 4 of 4) sorted by relevance
213 crtc_state->cmrr.cmrr_n = mul_u32_u32(desired_refresh_rate * adjusted_mode->crtc_htotal, in cmrr_get_vtotal()216 crtc_state->cmrr.cmrr_n); in cmrr_get_vtotal()218 crtc_state->cmrr.cmrr_m = do_div(adjusted_pixel_rate, crtc_state->cmrr.cmrr_n); in cmrr_get_vtotal()236 crtc_state->cmrr.enable = true; in intel_vrr_compute_cmrr_timings()629 if (crtc_state->cmrr.enable) { in intel_vrr_set_transcoder_timings()631 upper_32_bits(crtc_state->cmrr.cmrr_m)); in intel_vrr_set_transcoder_timings()633 lower_32_bits(crtc_state->cmrr.cmrr_m)); in intel_vrr_set_transcoder_timings()635 upper_32_bits(crtc_state->cmrr.cmrr_n)); in intel_vrr_set_transcoder_timings()637 lower_32_bits(crtc_state->cmrr.cmrr_n)); in intel_vrr_set_transcoder_timings()955 intel_vrr_tg_enable(crtc_state, crtc_state->cmrr.enable); in intel_vrr_enable()[all …]
931 return old_crtc_state->cmrr.cmrr_m != new_crtc_state->cmrr.cmrr_m || in cmrr_params_changed()932 old_crtc_state->cmrr.cmrr_n != new_crtc_state->cmrr.cmrr_n; in cmrr_params_changed()5487 PIPE_CONF_CHECK_LLI(cmrr.cmrr_m); in intel_pipe_config_compare()5488 PIPE_CONF_CHECK_LLI(cmrr.cmrr_n); in intel_pipe_config_compare()5489 PIPE_CONF_CHECK_BOOL(cmrr.enable); in intel_pipe_config_compare()
1406 } cmrr; member
3144 if (crtc_state->cmrr.enable) { in intel_dp_compute_as_sdp()