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Searched refs:cmdq_base (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/infiniband/hw/bng_re/
H A Dbng_tlv.h26 static inline u8 __get_cmdq_base_opcode(struct cmdq_base *req, u32 size) in __get_cmdq_base_opcode()
29 return ((struct cmdq_base *)GET_TLV_DATA(req))->opcode; in __get_cmdq_base_opcode()
34 static inline void __set_cmdq_base_opcode(struct cmdq_base *req, in __set_cmdq_base_opcode()
38 ((struct cmdq_base *)GET_TLV_DATA(req))->opcode = val; in __set_cmdq_base_opcode()
43 static inline __le16 __get_cmdq_base_cookie(struct cmdq_base *req, u32 size) in __get_cmdq_base_cookie()
46 return ((struct cmdq_base *)GET_TLV_DATA(req))->cookie; in __get_cmdq_base_cookie()
51 static inline void __set_cmdq_base_cookie(struct cmdq_base *req, in __set_cmdq_base_cookie()
55 ((struct cmdq_base *)GET_TLV_DATA(req))->cookie = val; in __set_cmdq_base_cookie()
60 static inline __le64 __get_cmdq_base_resp_addr(struct cmdq_base *req, u32 size) in __get_cmdq_base_resp_addr()
63 return ((struct cmdq_base *)GET_TLV_DATA(req))->resp_addr; in __get_cmdq_base_resp_addr()
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H A Dbng_fw.h132 struct cmdq_base *req;
140 static inline void bng_re_rcfw_cmd_prep(struct cmdq_base *req, in bng_re_rcfw_cmd_prep()
163 static inline u32 bng_re_get_cmd_slots(struct cmdq_base *req) in bng_re_get_cmd_slots()
179 static inline u32 bng_re_set_cmd_slots(struct cmdq_base *req) in bng_re_set_cmd_slots()
H A Dbng_sp.c27 bng_re_rcfw_cmd_prep((struct cmdq_base *)&req, in bng_re_query_version()
53 bng_re_rcfw_cmd_prep((struct cmdq_base *)&req, in bng_re_get_dev_attr()
H A Dbng_fw.c712 bng_re_rcfw_cmd_prep((struct cmdq_base *)&req, in bng_re_deinit_rcfw()
747 bng_re_rcfw_cmd_prep((struct cmdq_base *)&req, in bng_re_init_rcfw()
/linux/drivers/infiniband/hw/bnxt_re/
H A Dqplib_tlv.h48 static inline u8 __get_cmdq_base_opcode(struct cmdq_base *req, u32 size) in __get_cmdq_base_opcode()
51 return ((struct cmdq_base *)GET_TLV_DATA(req))->opcode; in __get_cmdq_base_opcode()
56 static inline void __set_cmdq_base_opcode(struct cmdq_base *req, in __set_cmdq_base_opcode()
60 ((struct cmdq_base *)GET_TLV_DATA(req))->opcode = val; in __set_cmdq_base_opcode()
65 static inline __le16 __get_cmdq_base_cookie(struct cmdq_base *req, u32 size) in __get_cmdq_base_cookie()
68 return ((struct cmdq_base *)GET_TLV_DATA(req))->cookie; in __get_cmdq_base_cookie()
73 static inline void __set_cmdq_base_cookie(struct cmdq_base *req, in __set_cmdq_base_cookie()
77 ((struct cmdq_base *)GET_TLV_DATA(req))->cookie = val; in __set_cmdq_base_cookie()
82 static inline __le64 __get_cmdq_base_resp_addr(struct cmdq_base *req, u32 size) in __get_cmdq_base_resp_addr()
85 return ((struct cmdq_base *)GET_TLV_DATA(req))->resp_addr; in __get_cmdq_base_resp_addr()
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H A Dqplib_sp.c78 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_query_version()
106 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_get_dev_attr()
211 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_set_func_resources()
280 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_del_sgid()
350 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_add_sgid()
415 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_create_ah()
460 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_destroy_ah()
486 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_free_mrw()
521 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_alloc_mrw()
559 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_dereg_mrw()
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H A Dqplib_rcfw.c459 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in __destroy_timedout_ah()
463 msg.req = (struct cmdq_base *)&req; in __destroy_timedout_ah()
818 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_deinit_rcfw()
841 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_init_rcfw()
H A Dqplib_fp.c627 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_destroy_srq()
663 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_create_srq()
729 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_query_srq()
832 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_create_qp1()
978 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_create_qp()
1320 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_modify_qp()
1454 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_query_qp()
1588 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_destroy_qp()
2221 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_create_cq()
2308 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, in bnxt_qplib_resize_cq()
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/linux/drivers/gpu/drm/mediatek/
H A Dmtk_ethdr.c73 struct cmdq_client_reg cmdq_base; member
178 mtk_ddp_write(cmdq_pkt, 0, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_SIZE(idx)); in mtk_ethdr_layer_config()
206 mtk_ddp_write(cmdq_pkt, pending->height << 16 | align_width, &mixer->cmdq_base, in mtk_ethdr_layer_config()
208 mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_OFFSET(idx)); in mtk_ethdr_layer_config()
209 mtk_ddp_write(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx)); in mtk_ethdr_layer_config()
210 mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer->regs, MIX_SRC_CON, in mtk_ethdr_layer_config()
228 mtk_ddp_write(cmdq_pkt, HDR_VDO_FE_0804_BYPASS_ALL, &vdo_fe0->cmdq_base, in mtk_ethdr_config()
231 mtk_ddp_write(cmdq_pkt, HDR_VDO_FE_0804_BYPASS_ALL, &vdo_fe1->cmdq_base, in mtk_ethdr_config()
234 mtk_ddp_write(cmdq_pkt, HDR_GFX_FE_0204_BYPASS_ALL, &gfx_fe0->cmdq_base, in mtk_ethdr_config()
237 mtk_ddp_write(cmdq_pkt, HDR_GFX_FE_0204_BYPASS_ALL, &gfx_fe1->cmdq_base, in mtk_ethdr_config()
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/linux/tools/testing/selftests/kvm/lib/arm64/
H A Dgic_v3_its.c175 static void its_send_cmd(void *cmdq_base, struct its_cmd_block *cmd) in its_send_cmd() argument
178 struct its_cmd_block *dst = cmdq_base + cwriter; in its_send_cmd()
207 void its_send_mapd_cmd(void *cmdq_base, u32 device_id, vm_paddr_t itt_base, in its_send_mapd_cmd() argument
218 its_send_cmd(cmdq_base, &cmd); in its_send_mapd_cmd()
221 void its_send_mapc_cmd(void *cmdq_base, u32 vcpu_id, u32 collection_id, bool valid) in its_send_mapc_cmd() argument
230 its_send_cmd(cmdq_base, &cmd); in its_send_mapc_cmd()
233 void its_send_mapti_cmd(void *cmdq_base, u32 device_id, u32 event_id, in its_send_mapti_cmd() argument
244 its_send_cmd(cmdq_base, &cmd); in its_send_mapti_cmd()
247 void its_send_invall_cmd(void *cmdq_base, u32 collection_id) in its_send_invall_cmd() argument
254 its_send_cmd(cmdq_base, &cmd); in its_send_invall_cmd()
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/linux/tools/testing/selftests/kvm/include/arm64/
H A Dgic_v3_its.h12 void its_send_mapd_cmd(void *cmdq_base, u32 device_id, vm_paddr_t itt_base,
14 void its_send_mapc_cmd(void *cmdq_base, u32 vcpu_id, u32 collection_id, bool valid);
15 void its_send_mapti_cmd(void *cmdq_base, u32 device_id, u32 event_id,
17 void its_send_invall_cmd(void *cmdq_base, u32 collection_id);
18 void its_send_sync_cmd(void *cmdq_base, u32 vcpu_id);
/linux/tools/testing/selftests/kvm/arm64/
H A Dvgic_lpi_stress.c40 vm_paddr_t cmdq_base; member
117 test_data.cmdq_base, SZ_64K); in guest_setup_gic()
191 vm_paddr_t cmdq_base; in setup_test_data() local
201 cmdq_base = vm_phy_pages_alloc(vm, pages_per_64k, gpa_base, in setup_test_data()
203 virt_map(vm, cmdq_base, cmdq_base, pages_per_64k); in setup_test_data()
204 test_data.cmdq_base = cmdq_base; in setup_test_data()
205 test_data.cmdq_base_va = (void *)cmdq_base; in setup_test_data()
/linux/drivers/accel/ivpu/
H A Divpu_jsm_msg.c287 u32 pid, u32 engine, u64 cmdq_base, u32 cmdq_size) in ivpu_jsm_hws_create_cmdq() argument
298 req.payload.hws_create_cmdq.cmdq_base = cmdq_base; in ivpu_jsm_hws_create_cmdq()
327 u64 cmdq_base, u32 cmdq_size) in ivpu_jsm_hws_register_db() argument
336 req.payload.hws_register_db.cmdq_base = cmdq_base; in ivpu_jsm_hws_register_db()