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Searched refs:clr_bits (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/xe/
H A Dxe_rtp.h264 .clr_bits = ~0u, .set_bits = (val_), \
282 .clr_bits = val_, .set_bits = val_, \
300 .clr_bits = val_, .set_bits = 0, \
317 .clr_bits = mask_bits_, .set_bits = val_, \
322 .clr_bits = (mask_bits_), .set_bits = (val_), \
341 .clr_bits = mask_bits_, .set_func = func_, .use_func = 1, \
357 .clr_bits = RING_FORCE_TO_NONPRIV_MASK_VALID, \
H A Dxe_rtp_types.h31 u32 clr_bits; member
H A Dxe_rtp.c236 .clr_bits = action->clr_bits, in rtp_add_sr_entry()
H A Dxe_reg_whitelist.c184 .clr_bits = ~0u, in whitelist_apply_to_hwe()
/linux/drivers/gpu/drm/sprd/
H A Dsprd_dpu.h83 dpu_reg_clr(struct dpu_context *ctx, u32 offset, u32 clr_bits) in dpu_reg_clr() argument
87 writel(bits & ~clr_bits, ctx->base + offset); in dpu_reg_clr()
/linux/drivers/gpu/drm/xe/tests/
H A Dxe_rtp_test.c555 KUNIT_EXPECT_EQ(test, sr_entry->clr_bits, param->expected_clr_bits); in xe_rtp_process_to_sr_tests()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_ddi.c3062 u32 clr_bits, wait_bits; in mtl_ddi_disable_d2d() local
3070 clr_bits = XE2LPD_DDI_BUF_D2D_LINK_ENABLE; in mtl_ddi_disable_d2d()
3074 clr_bits = XELPDP_PORT_BUF_D2D_LINK_ENABLE; in mtl_ddi_disable_d2d()
3078 intel_de_rmw(display, reg, clr_bits, 0); in mtl_ddi_disable_d2d()