Searched refs:clr_bits (Results 1 – 5 of 5) sorted by relevance
| /linux/drivers/gpu/drm/xe/ |
| H A D | xe_reg_sr.c | 56 if (e1->clr_bits & e2->clr_bits || e1->set_bits & e2->set_bits || in compatible_entries()
57 e1->clr_bits & e2->set_bits || e1->set_bits & e2->clr_bits) in compatible_entries()
87 pentry->clr_bits |= e->clr_bits; in xe_reg_sr_add()
112 idx, e->clr_bits, e->set_bits, in xe_reg_sr_add()
145 val = entry->clr_bits << 16; in apply_one_mmio()
146 else if (entry->clr_bits + 1) in apply_one_mmio()
149 xe_mmio_read32(>->mmio, reg)) & (~entry->clr_bits); in apply_one_mmio()
210 reg, entry->clr_bits, entry->set_bits, in xe_reg_sr_dump()
241 u32 mask = entry->clr_bits | entry->set_bits; in xe_reg_sr_readback_check()
268 u32 mask = entry->clr_bits | entry->set_bits; in xe_reg_sr_lrc_check()
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| H A D | xe_reg_sr_types.h | 16 u32 clr_bits; member
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| H A D | xe_gt.c | 231 if (entry->reg.masked || entry->clr_bits == ~0) in emit_wa_job()
291 val = entry->clr_bits << 16; in emit_wa_job()
292 else if (entry->clr_bits == ~0) in emit_wa_job()
307 if (entry->reg.masked || entry->clr_bits == ~0) in emit_wa_job()
329 *cs++ = entry->clr_bits; in emit_wa_job()
348 entry->reg.addr, entry->clr_bits, entry->set_bits, in emit_wa_job()
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| H A D | xe_reg_whitelist.c | 161 .clr_bits = ~0u, in whitelist_apply_to_hwe()
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| /linux/drivers/gpu/drm/sprd/ |
| H A D | sprd_dpu.h | 83 dpu_reg_clr(struct dpu_context *ctx, u32 offset, u32 clr_bits) in dpu_reg_clr() argument
87 writel(bits & ~clr_bits, ctx->base + offset); in dpu_reg_clr()
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