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Searched refs:clock_info (Results 1 – 25 of 46) sorted by relevance

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/linux/drivers/net/ethernet/qlogic/qede/
H A Dqede_ptp.c12 struct ptp_clock_info clock_info; member
42 struct qede_ptp *ptp = container_of(info, struct qede_ptp, clock_info); in qede_ptp_adjfine()
66 ptp = container_of(info, struct qede_ptp, clock_info); in qede_ptp_adjtime()
85 ptp = container_of(info, struct qede_ptp, clock_info); in qede_ptp_gettime()
106 ptp = container_of(info, struct qede_ptp, clock_info); in qede_ptp_settime()
129 ptp = container_of(info, struct qede_ptp, clock_info); in qede_ptp_ancillary_feature_enable()
454 ptp->clock_info.owner = THIS_MODULE; in qede_ptp_enable()
455 snprintf(ptp->clock_info.name, 16, "%s", edev->ndev->name); in qede_ptp_enable()
456 ptp->clock_info.max_adj = QED_MAX_PHC_DRIFT_PPB; in qede_ptp_enable()
457 ptp->clock_info.n_alarm = 0; in qede_ptp_enable()
[all …]
/linux/drivers/gpu/drm/radeon/
H A Dradeon_atombios.c2074 &rdev->pm.power_state[state_index].clock_info[0]; in radeon_atombios_parse_misc_flags_1_3()
2076 rdev->pm.power_state[state_index].clock_info[0].flags |= in radeon_atombios_parse_misc_flags_1_3()
2128 if (!rdev->pm.power_state[state_index].clock_info) { in radeon_atombios_parse_power_table_1_3()
2129 rdev->pm.power_state[state_index].clock_info = in radeon_atombios_parse_power_table_1_3()
2133 if (!rdev->pm.power_state[state_index].clock_info) in radeon_atombios_parse_power_table_1_3()
2136 rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; in radeon_atombios_parse_power_table_1_3()
2139 rdev->pm.power_state[state_index].clock_info[0].mclk = in radeon_atombios_parse_power_table_1_3()
2141 rdev->pm.power_state[state_index].clock_info[0].sclk = in radeon_atombios_parse_power_table_1_3()
2144 if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || in radeon_atombios_parse_power_table_1_3()
2145 (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) in radeon_atombios_parse_power_table_1_3()
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H A Dradeon_combios.c2637 rdev->pm.power_state[0].clock_info = in radeon_combios_get_power_modes()
2640 rdev->pm.power_state[1].clock_info = in radeon_combios_get_power_modes()
2643 if (!rdev->pm.power_state[0].clock_info || in radeon_combios_get_power_modes()
2644 !rdev->pm.power_state[1].clock_info) in radeon_combios_get_power_modes()
2721 rdev->pm.power_state[state_index].clock_info[0].mclk = RBIOS32(offset + 0x5 + 0x2); in radeon_combios_get_power_modes()
2722 rdev->pm.power_state[state_index].clock_info[0].sclk = RBIOS32(offset + 0x5 + 0x6); in radeon_combios_get_power_modes()
2723 if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || in radeon_combios_get_power_modes()
2724 (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) in radeon_combios_get_power_modes()
2734 rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_GPIO; in radeon_combios_get_power_modes()
2736 rdev->pm.power_state[state_index].clock_info[0].voltage.active_high = in radeon_combios_get_power_modes()
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H A Drs780_dpm.c749 union pplib_clock_info *clock_info) in rs780_parse_pplib_clock_info() argument
754 sclk = le16_to_cpu(clock_info->rs780.usLowEngineClockLow); in rs780_parse_pplib_clock_info()
755 sclk |= clock_info->rs780.ucLowEngineClockHigh << 16; in rs780_parse_pplib_clock_info()
757 sclk = le16_to_cpu(clock_info->rs780.usHighEngineClockLow); in rs780_parse_pplib_clock_info()
758 sclk |= clock_info->rs780.ucHighEngineClockHigh << 16; in rs780_parse_pplib_clock_info()
760 switch (le16_to_cpu(clock_info->rs780.usVDDC)) { in rs780_parse_pplib_clock_info()
779 ps->flags = le32_to_cpu(clock_info->rs780.ulFlags); in rs780_parse_pplib_clock_info()
795 union pplib_clock_info *clock_info; in rs780_parse_power_table() local
824 clock_info = (union pplib_clock_info *) in rs780_parse_power_table()
840 clock_info); in rs780_parse_power_table()
H A Drv770_dpm.c2177 union pplib_clock_info *clock_info) in rv7xx_parse_pplib_clock_info() argument
2199 sclk = le16_to_cpu(clock_info->evergreen.usEngineClockLow); in rv7xx_parse_pplib_clock_info()
2200 sclk |= clock_info->evergreen.ucEngineClockHigh << 16; in rv7xx_parse_pplib_clock_info()
2201 mclk = le16_to_cpu(clock_info->evergreen.usMemoryClockLow); in rv7xx_parse_pplib_clock_info()
2202 mclk |= clock_info->evergreen.ucMemoryClockHigh << 16; in rv7xx_parse_pplib_clock_info()
2204 pl->vddc = le16_to_cpu(clock_info->evergreen.usVDDC); in rv7xx_parse_pplib_clock_info()
2205 pl->vddci = le16_to_cpu(clock_info->evergreen.usVDDCI); in rv7xx_parse_pplib_clock_info()
2206 pl->flags = le32_to_cpu(clock_info->evergreen.ulFlags); in rv7xx_parse_pplib_clock_info()
2208 sclk = le16_to_cpu(clock_info->r600.usEngineClockLow); in rv7xx_parse_pplib_clock_info()
2209 sclk |= clock_info->r600.ucEngineClockHigh << 16; in rv7xx_parse_pplib_clock_info()
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H A Dradeon_pm.c184 clock_info[rdev->pm.requested_clock_mode_index].sclk; in radeon_set_power_state()
198 clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].mclk; in radeon_set_power_state()
201 clock_info[rdev->pm.requested_clock_mode_index].mclk; in radeon_set_power_state()
326 struct radeon_pm_clock_info *clock_info; in radeon_pm_print_states() local
341 clock_info = &(power_state->clock_info[j]); in radeon_pm_print_states()
345 clock_info->sclk * 10); in radeon_pm_print_states()
349 clock_info->sclk * 10, in radeon_pm_print_states()
350 clock_info->mclk * 10, in radeon_pm_print_states()
351 clock_info->voltage.voltage); in radeon_pm_print_states()
1299 …rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vol… in radeon_pm_resume_old()
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H A Dtrinity_dpm.c1661 union pplib_clock_info *clock_info) in trinity_parse_pplib_clock_info() argument
1668 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in trinity_parse_pplib_clock_info()
1669 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in trinity_parse_pplib_clock_info()
1671 pl->vddc_index = clock_info->sumo.vddcIndex; in trinity_parse_pplib_clock_info()
1687 union pplib_clock_info *clock_info; in trinity_parse_power_table() local
1725 if (!rdev->pm.power_state[i].clock_info) { in trinity_parse_power_table()
1743 clock_info = (union pplib_clock_info *) in trinity_parse_power_table()
1748 clock_info); in trinity_parse_power_table()
1762 clock_info = (union pplib_clock_info *) in trinity_parse_power_table()
1764 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in trinity_parse_power_table()
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H A Drv6xx_dpm.c1818 union pplib_clock_info *clock_info) in rv6xx_parse_pplib_clock_info() argument
1838 sclk = le16_to_cpu(clock_info->r600.usEngineClockLow); in rv6xx_parse_pplib_clock_info()
1839 sclk |= clock_info->r600.ucEngineClockHigh << 16; in rv6xx_parse_pplib_clock_info()
1840 mclk = le16_to_cpu(clock_info->r600.usMemoryClockLow); in rv6xx_parse_pplib_clock_info()
1841 mclk |= clock_info->r600.ucMemoryClockHigh << 16; in rv6xx_parse_pplib_clock_info()
1845 pl->vddc = le16_to_cpu(clock_info->r600.usVDDC); in rv6xx_parse_pplib_clock_info()
1846 pl->flags = le32_to_cpu(clock_info->r600.ulFlags); in rv6xx_parse_pplib_clock_info()
1878 union pplib_clock_info *clock_info; in rv6xx_parse_power_table() local
1918 clock_info = (union pplib_clock_info *) in rv6xx_parse_power_table()
1924 clock_info); in rv6xx_parse_power_table()
H A Dsumo_dpm.c1429 union pplib_clock_info *clock_info) in sumo_parse_pplib_clock_info() argument
1436 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in sumo_parse_pplib_clock_info()
1437 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in sumo_parse_pplib_clock_info()
1439 pl->vddc_index = clock_info->sumo.vddcIndex; in sumo_parse_pplib_clock_info()
1440 pl->sclk_dpm_tdp_limit = clock_info->sumo.tdpLimit; in sumo_parse_pplib_clock_info()
1456 union pplib_clock_info *clock_info; in sumo_parse_power_table() local
1494 if (!rdev->pm.power_state[i].clock_info) { in sumo_parse_power_table()
1511 clock_info = (union pplib_clock_info *) in sumo_parse_power_table()
1516 clock_info); in sumo_parse_power_table()
H A Dkv_dpm.c2408 union pplib_clock_info *clock_info) in kv_parse_pplib_clock_info() argument
2415 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in kv_parse_pplib_clock_info()
2416 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in kv_parse_pplib_clock_info()
2418 pl->vddc_index = clock_info->sumo.vddcIndex; in kv_parse_pplib_clock_info()
2434 union pplib_clock_info *clock_info; in kv_parse_power_table() local
2472 if (!rdev->pm.power_state[i].clock_info) in kv_parse_power_table()
2488 clock_info = (union pplib_clock_info *) in kv_parse_power_table()
2493 clock_info); in kv_parse_power_table()
2507 clock_info = (union pplib_clock_info *) in kv_parse_power_table()
2509 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in kv_parse_power_table()
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H A Dsi_dpm.c6670 union pplib_clock_info *clock_info) in si_parse_pplib_clock_info() argument
6682 pl->sclk = le16_to_cpu(clock_info->si.usEngineClockLow); in si_parse_pplib_clock_info()
6683 pl->sclk |= clock_info->si.ucEngineClockHigh << 16; in si_parse_pplib_clock_info()
6684 pl->mclk = le16_to_cpu(clock_info->si.usMemoryClockLow); in si_parse_pplib_clock_info()
6685 pl->mclk |= clock_info->si.ucMemoryClockHigh << 16; in si_parse_pplib_clock_info()
6687 pl->vddc = le16_to_cpu(clock_info->si.usVDDC); in si_parse_pplib_clock_info()
6688 pl->vddci = le16_to_cpu(clock_info->si.usVDDCI); in si_parse_pplib_clock_info()
6689 pl->flags = le32_to_cpu(clock_info->si.ulFlags); in si_parse_pplib_clock_info()
6693 clock_info->si.ucPCIEGen); in si_parse_pplib_clock_info()
6750 union pplib_clock_info *clock_info; in si_parse_power_table() local
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H A Dci_dpm.c5432 union pplib_clock_info *clock_info) in ci_parse_pplib_clock_info() argument
5440 pl->sclk = le16_to_cpu(clock_info->ci.usEngineClockLow); in ci_parse_pplib_clock_info()
5441 pl->sclk |= clock_info->ci.ucEngineClockHigh << 16; in ci_parse_pplib_clock_info()
5442 pl->mclk = le16_to_cpu(clock_info->ci.usMemoryClockLow); in ci_parse_pplib_clock_info()
5443 pl->mclk |= clock_info->ci.ucMemoryClockHigh << 16; in ci_parse_pplib_clock_info()
5448 clock_info->ci.ucPCIEGen); in ci_parse_pplib_clock_info()
5451 le16_to_cpu(clock_info->ci.usPCIELane)); in ci_parse_pplib_clock_info()
5505 union pplib_clock_info *clock_info; in ci_parse_power_table() local
5545 if (!rdev->pm.power_state[i].clock_info) { in ci_parse_power_table()
5566 clock_info = (union pplib_clock_info *) in ci_parse_power_table()
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/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_audio.c1069 struct azalia_clock_info clock_info = { 0 }; in dce_aud_wall_dto_setup() local
1083 &clock_info); in dce_aud_wall_dto_setup()
1090 clock_info.audio_dto_module,\ in dce_aud_wall_dto_setup()
1091 clock_info.audio_dto_phase); in dce_aud_wall_dto_setup()
1108 DCCG_AUDIO_DTO0_MODULE, clock_info.audio_dto_module); in dce_aud_wall_dto_setup()
1112 DCCG_AUDIO_DTO0_PHASE, clock_info.audio_dto_phase); in dce_aud_wall_dto_setup()
1124 &clock_info); in dce_aud_wall_dto_setup()
1140 DCCG_AUDIO_DTO1_MODULE, clock_info.audio_dto_module); in dce_aud_wall_dto_setup()
1144 DCCG_AUDIO_DTO1_PHASE, clock_info.audio_dto_phase); in dce_aud_wall_dto_setup()
1161 struct azalia_clock_info clock_info = { 0 }; in dce60_aud_wall_dto_setup() local
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/linux/drivers/firmware/arm_scmi/
H A Dclock.c158 struct clock_info { struct
182 scmi_clock_domain_lookup(struct clock_info *ci, u32 clk_id) in scmi_clock_domain_lookup() argument
192 struct clock_info *ci) in scmi_clock_protocol_attributes_get()
348 u32 clk_id, struct clock_info *cinfo, in scmi_clock_attributes_get()
574 struct clock_info *ci = ph->get_priv(ph); in scmi_clock_rate_set()
659 struct clock_info *ci = ph->get_priv(ph); in scmi_clock_set_parent()
755 struct clock_info *ci = ph->get_priv(ph); in scmi_clock_enable()
772 struct clock_info *ci = ph->get_priv(ph); in scmi_clock_disable()
862 struct clock_info *ci = ph->get_priv(ph); in scmi_clock_state_get()
873 struct clock_info *ci = ph->get_priv(ph); in scmi_clock_config_oem_set()
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/linux/drivers/clk/ingenic/
H A Dcgu.h202 const struct ingenic_cgu_clk_info *clock_info; member
233 ingenic_cgu_new(const struct ingenic_cgu_clk_info *clock_info,
H A Dcgu.c30 return &clk->cgu->clock_info[clk->idx]; in to_clk_info()
644 const struct ingenic_cgu_clk_info *clk_info = &cgu->clock_info[idx]; in ingenic_register_clock()
786 ingenic_cgu_new(const struct ingenic_cgu_clk_info *clock_info, in ingenic_cgu_new() argument
802 cgu->clock_info = clock_info; in ingenic_cgu_new()
844 if (cgu->clock_info[i].type & CGU_CLK_EXT) in ingenic_cgu_register_clocks()
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dprocesspptables.h37 const void *clock_info);
H A Dhardwaremanager.c418 …ks(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *clock_info) in phm_get_current_shallow_sleep_clocks() argument
425 return hwmgr->hwmgr_func->get_current_shallow_sleep_clocks(hwmgr, state, clock_info); in phm_get_current_shallow_sleep_clocks()
H A Dsmu10_hwmgr.c893 const void *clock_info) in smu10_dpm_get_pp_table_entry_callback() argument
1137 const struct pp_hw_power_state *state, struct pp_clock_info *clock_info) in smu10_get_current_shallow_sleep_clocks() argument
1141 clock_info->min_eng_clk = ps->levels[0].engine_clock / (1 << (ps->levels[0].ss_divider_index)); in smu10_get_current_shallow_sleep_clocks()
1142 …clock_info->max_eng_clk = ps->levels[ps->level - 1].engine_clock / (1 << (ps->levels[ps->level - 1… in smu10_get_current_shallow_sleep_clocks()
H A Dsmu8_hwmgr.c1389 const void *clock_info) in smu8_dpm_get_pp_table_entry_callback() argument
1393 const ATOM_PPLIB_CZ_CLOCK_INFO *smu8_clock_info = clock_info; in smu8_dpm_get_pp_table_entry_callback()
1647 const struct pp_hw_power_state *state, struct pp_clock_info *clock_info) in smu8_get_current_shallow_sleep_clocks() argument
1651 clock_info->min_eng_clk = ps->levels[0].engineClock / (1 << (ps->levels[0].ssDividerIndex)); in smu8_get_current_shallow_sleep_clocks()
1652 …clock_info->max_eng_clk = ps->levels[ps->level - 1].engineClock / (1 << (ps->levels[ps->level - 1]… in smu8_get_current_shallow_sleep_clocks()
/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dsdi.c150 sdi.mgr_config.clock_info = dispc_cinfo; in sdi_display_enable()
181 dispc_mgr_set_clock_div(out->manager->id, &sdi.mgr_config.clock_info); in sdi_display_enable()
H A Dmanager.c186 struct dispc_clock_info cinfo = config->clock_info; in dss_mgr_check_lcd_config()
H A Ddpi.c291 dpi->mgr_config.clock_info = ctx.dispc_cinfo; in dpi_set_dsi_clk()
315 dpi->mgr_config.clock_info = ctx.dispc_cinfo; in dpi_set_dispc_clk()
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dkv_dpm.c2673 union pplib_clock_info *clock_info) in kv_parse_pplib_clock_info() argument
2680 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in kv_parse_pplib_clock_info()
2681 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in kv_parse_pplib_clock_info()
2683 pl->vddc_index = clock_info->sumo.vddcIndex; in kv_parse_pplib_clock_info()
2699 union pplib_clock_info *clock_info; in kv_parse_power_table() local
2751 clock_info = (union pplib_clock_info *) in kv_parse_power_table()
2756 clock_info); in kv_parse_power_table()
2770 clock_info = (union pplib_clock_info *) in kv_parse_power_table()
2772 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in kv_parse_power_table()
2773 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in kv_parse_power_table()
/linux/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_ptp.c588 struct ptp_clock_info *clock_info) in sparx5_ptp_phc_init() argument
592 phc->info = *clock_info; in sparx5_ptp_phc_init()

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