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Searched refs:clock_ctrl (Results 1 – 3 of 3) sorted by relevance

/linux/arch/mips/ath79/
H A Dclock.c147 u32 clock_ctrl; in ar933x_clocks_init() local
165 clock_ctrl = __raw_readl(pll_base + AR933X_PLL_CLOCK_CTRL_REG); in ar933x_clocks_init()
166 if (clock_ctrl & AR933X_PLL_CLOCK_CTRL_BYPASS) { in ar933x_clocks_init()
194 cpu_div = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT) & in ar933x_clocks_init()
197 ddr_div = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT) & in ar933x_clocks_init()
200 ahb_div = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT) & in ar933x_clocks_init()
/linux/drivers/iio/adc/
H A Dad4170-4.c454 unsigned int clock_ctrl; member
2424 st->clock_ctrl &= ~AD4170_CLOCK_CTRL_CLOCKSEL_MSK; in ad4170_sel_clk()
2425 st->clock_ctrl |= FIELD_PREP(AD4170_CLOCK_CTRL_CLOCKSEL_MSK, clk_sel); in ad4170_sel_clk()
2426 return regmap_write(st->regmap, AD4170_CLOCK_CTRL_REG, st->clock_ctrl); in ad4170_sel_clk()
2440 clk_sel = FIELD_GET(AD4170_CLOCK_CTRL_CLOCKSEL_MSK, st->clock_ctrl); in ad4170_clk_output_is_enabled()
2505 st->clock_ctrl |= FIELD_PREP(AD4170_CLOCK_CTRL_CLOCKSEL_MSK, in ad4170_clock_select()
2520 st->clock_ctrl |= FIELD_PREP(AD4170_CLOCK_CTRL_CLOCKSEL_MSK, in ad4170_clock_select()
2548 ret = regmap_write(st->regmap, AD4170_CLOCK_CTRL_REG, st->clock_ctrl); in ad4170_parse_firmware()
/linux/drivers/net/ethernet/broadcom/
H A Dtg3.c1085 u32 clock_ctrl; in tg3_switch_clocks() local
1091 clock_ctrl = tr32(TG3PCI_CLOCK_CTRL); in tg3_switch_clocks()
1093 orig_clock_ctrl = clock_ctrl; in tg3_switch_clocks()
1094 clock_ctrl &= (CLOCK_CTRL_FORCE_CLKRUN | in tg3_switch_clocks()
1097 tp->pci_clock_ctrl = clock_ctrl; in tg3_switch_clocks()
1102 clock_ctrl | CLOCK_CTRL_625_CORE, 40); in tg3_switch_clocks()
1106 clock_ctrl | in tg3_switch_clocks()
1110 clock_ctrl | (CLOCK_CTRL_ALTCLK), in tg3_switch_clocks()
1113 tw32_wait_f(TG3PCI_CLOCK_CTRL, clock_ctrl, 40); in tg3_switch_clocks()
17609 u32 clock_ctrl = tr32(TG3PCI_CLOCK_CTRL) & 0x1f; in tg3_bus_string() local
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