Searched refs:clock_cfg (Results 1 – 10 of 10) sorted by relevance
372 u64 clock_cfg; in ptp_start() local398 clock_cfg = readq(ptp->reg_base + PTP_CLOCK_CFG); in ptp_start()403 clock_cfg &= ~PTP_CLOCK_CFG_EXT_CLK_IN_MASK; in ptp_start()404 clock_cfg |= PTP_CLOCK_CFG_EXT_CLK_EN; in ptp_start()408 clock_cfg |= PTP_CLOCK_CFG_TSTMP_EDGE; in ptp_start()410 clock_cfg &= ~PTP_CLOCK_CFG_TSTMP_IN_MASK; in ptp_start()411 clock_cfg |= PTP_CLOCK_CFG_TSTMP_EN; in ptp_start()414 clock_cfg |= PTP_CLOCK_CFG_PTP_EN; in ptp_start()415 writeq(clock_cfg, ptp->reg_base + PTP_CLOCK_CFG); in ptp_start()416 clock_cfg = readq(ptp->reg_base + PTP_CLOCK_CFG); in ptp_start()[all …]
452 struct dc_clock_config *clock_cfg) in dcn2_get_clock() argument456 clock_cfg->max_clock_khz = context->bw_ctx.bw.dcn.clk.max_supported_dispclk_khz; in dcn2_get_clock()457 clock_cfg->min_clock_khz = DCN_MINIMUM_DISPCLK_Khz; in dcn2_get_clock()458 clock_cfg->current_clock_khz = clk_mgr->clks.dispclk_khz; in dcn2_get_clock()459 clock_cfg->bw_requirequired_clock_khz = context->bw_ctx.bw.dcn.clk.bw_dispclk_khz; in dcn2_get_clock()462 clock_cfg->max_clock_khz = context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz; in dcn2_get_clock()463 clock_cfg->min_clock_khz = DCN_MINIMUM_DPPCLK_Khz; in dcn2_get_clock()464 clock_cfg->current_clock_khz = clk_mgr->clks.dppclk_khz; in dcn2_get_clock()465 clock_cfg->bw_requirequired_clock_khz = context->bw_ctx.bw.dcn.clk.bw_dppclk_khz; in dcn2_get_clock()
51 struct dc_clock_config *clock_cfg);
50 void *clock_cfg; member167 .clock_cfg = (_struct) {_clk},\
632 struct clk_stm32_mux *mux = cfg->clock_cfg; in clk_stm32_mux_register()653 struct clk_stm32_gate *gate = cfg->clock_cfg; in clk_stm32_gate_register()674 struct clk_stm32_div *div = cfg->clock_cfg; in clk_stm32_div_register()695 struct clk_stm32_composite *composite = cfg->clock_cfg; in clk_stm32_composite_register()
369 u64 clock_cfg = 0ULL; in fsi_spi_transfer_init() local409 rc = fsi_spi_read_reg(ctx, SPI_FSI_CLOCK_CFG, &clock_cfg); in fsi_spi_transfer_init()413 if ((clock_cfg & (SPI_FSI_CLOCK_CFG_MM_ENABLE | in fsi_spi_transfer_init()
188 struct dc_clock_config *clock_cfg);
3911 struct dc_clock_config clock_cfg = {0}; in dcn10_set_clock() local3918 context, clock_type, &clock_cfg); in dcn10_set_clock()3920 if (clk_khz > clock_cfg.max_clock_khz) in dcn10_set_clock()3923 if (clk_khz < clock_cfg.min_clock_khz) in dcn10_set_clock()3926 if (clk_khz < clock_cfg.bw_requirequired_clock_khz) in dcn10_set_clock()3946 struct dc_clock_config *clock_cfg) in dcn10_get_clock() argument3951 dc->clk_mgr->funcs->get_clock(dc->clk_mgr, context, clock_type, clock_cfg); in dcn10_get_clock()
294 struct dc_clock_config *clock_cfg);
343 struct dc_clock_config *clock_cfg);