Searched refs:clk_trail (Results 1 – 6 of 6) sorted by relevance
45 cfg->clk_trail = 60000; in phy_mipi_dphy_calc_config()135 if (cfg->clk_trail < 60000) in phy_mipi_dphy_config_validate()
92 unsigned int clk_trail; member
17 writel(DSI_20nm_PHY_TIMING_CTRL_1_CLK_TRAIL(timing->clk_trail), in dsi_20nm_dphy_set_timing()
1163 writel(timing->clk_trail, base + REG_DSI_7nm_PHY_CMN_TIMING_CTRL_3); in dsi_7nm_phy_enable()
248 DIV_ROUND_UP(priv->config.clk_trail, temp) | in phy_meson_axg_mipi_dphy_power_on()
929 int clk_prepare, lpx, clk_zero, clk_post, clk_trail; in samsung_dsim_set_phy_ctrl() local960 clk_trail = PS_TO_CYCLE(cfg.clk_trail, byte_clock); in samsung_dsim_set_phy_ctrl()998 DSIM_PHYTIMING1_CLK_TRAIL(clk_trail); in samsung_dsim_set_phy_ctrl()