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Searched refs:clk_s (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Drv740_dpm.c163 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in rv740_populate_sclk_value() local
164 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in rv740_populate_sclk_value()
167 cg_spll_spread_spectrum |= CLK_S(clk_s); in rv740_populate_sclk_value()
252 u32 clk_s, clk_v; in rv740_populate_mclk_value() local
256 clk_s = reference_clock * 5 / (decoded_ref * ss.rate); in rv740_populate_mclk_value()
258 (dividers.whole_fb_div + (dividers.frac_fb_div / 8)) / (clk_s * 10000); in rv740_populate_mclk_value()
264 mpll_ss2 |= CLKS(clk_s); in rv740_populate_mclk_value()
H A Drv730_dpm.c94 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in rv730_populate_sclk_value() local
95 u32 clk_v = ss.percentage * fbdiv / (clk_s * 10000); in rv730_populate_sclk_value()
98 cg_spll_spread_spectrum |= CLK_S(clk_s); in rv730_populate_sclk_value()
170 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in rv730_populate_mclk_value() local
171 u32 clk_v = ss.percentage * dividers.fb_div / (clk_s * 10000); in rv730_populate_mclk_value()
174 mpll_ss |= CLK_S(clk_s); in rv730_populate_mclk_value()
H A Drv6xx_dpm.c315 u32 index, u32 clk_s) in rv6xx_set_engine_spread_spectrum_clk_s() argument
318 CLKS(clk_s), ~CLKS_MASK); in rv6xx_set_engine_spread_spectrum_clk_s()
340 u32 clk_s) in rv6xx_set_memory_spread_spectrum_clk_s() argument
342 WREG32_P(CG_MPLL_SPREAD_SPECTRUM, CLKS(clk_s), ~CLKS_MASK); in rv6xx_set_memory_spread_spectrum_clk_s()
555 u32 vco_freq, clk_v, clk_s; in rv6xx_program_engine_spread_spectrum() local
572 clk_s = rv6xx_calculate_spread_spectrum_clk_s(ss.rate, in rv6xx_program_engine_spread_spectrum()
576 rv6xx_set_engine_spread_spectrum_clk_s(rdev, level, clk_s); in rv6xx_program_engine_spread_spectrum()
658 u32 vco_freq = 0, clk_v, clk_s; in rv6xx_program_mclk_spread_spectrum_parameters() local
690 clk_s = rv6xx_calculate_spread_spectrum_clk_s(ss.rate, in rv6xx_program_mclk_spread_spectrum_parameters()
694 rv6xx_set_memory_spread_spectrum_clk_s(rdev, clk_s); in rv6xx_program_mclk_spread_spectrum_parameters()
H A Dni_dpm.c2046 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in ni_calculate_sclk_params() local
2047 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in ni_calculate_sclk_params()
2050 cg_spll_spread_spectrum |= CLK_S(clk_s); in ni_calculate_sclk_params()
2098 u32 clk_s; in ni_init_smc_spll_table() local
2118 clk_s = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM & CLK_S_MASK) >> CLK_S_SHIFT; in ni_init_smc_spll_table()
2128 if (clk_s & ~(SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_MASK >> SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT)) in ni_init_smc_spll_table()
2145 ((clk_s << SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT) & SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_MASK); in ni_init_smc_spll_table()
2244 u32 clk_s, clk_v; in ni_populate_mclk_value() local
2248 clk_s = reference_clock * 5 / (decoded_ref * ss.rate); in ni_populate_mclk_value()
2250 (0x4000 * dividers.whole_fb_div + 0x800 * dividers.frac_fb_div) / (clk_s * 625); in ni_populate_mclk_value()
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H A Dcypress_dpm.c560 u32 clk_s, clk_v; in cypress_populate_mclk_value() local
564 clk_s = reference_clock * 5 / (decoded_ref * ss.rate); in cypress_populate_mclk_value()
566 (0x4000 * dividers.whole_fb_div + 0x800 * dividers.frac_fb_div) / (clk_s * 625); in cypress_populate_mclk_value()
572 mpll_ss2 |= CLKS(clk_s); in cypress_populate_mclk_value()
H A Drv770_dpm.c545 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in rv770_populate_sclk_value() local
546 u32 clk_v = ss.percentage * fbdiv / (clk_s * 10000); in rv770_populate_sclk_value()
549 cg_spll_spread_spectrum |= CLKS(clk_s); in rv770_populate_sclk_value()
H A Dsi_dpm.c2788 u32 clk_s, clk_v; in si_init_smc_spll_table() local
2808 clk_s = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM & CLK_S_MASK) >> CLK_S_SHIFT; in si_init_smc_spll_table()
2819 if (clk_s & ~(SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_MASK >> SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT)) in si_init_smc_spll_table()
2832 ((clk_s << SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT) & SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_MASK); in si_init_smc_spll_table()
4766 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in si_calculate_sclk_params() local
4767 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in si_calculate_sclk_params()
4770 cg_spll_spread_spectrum |= CLK_S(clk_s); in si_calculate_sclk_params()
H A Dci_dpm.c3149 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in ci_calculate_sclk_params() local
3150 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in ci_calculate_sclk_params()
3153 cg_spll_spread_spectrum |= CLK_S(clk_s); in ci_calculate_sclk_params()
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dfiji_smumgr.c911 uint32_t clk_s = ref_clock * 5 / in fiji_calculate_sclk_params() local
915 fbdiv / (clk_s * 10000); in fiji_calculate_sclk_params()
918 CG_SPLL_SPREAD_SPECTRUM, CLKS, clk_s); in fiji_calculate_sclk_params()
H A Dci_smumgr.c347 uint32_t clk_s = ref_clock * 5 / in ci_calculate_sclk_params() local
350 fbdiv / (clk_s * 10000); in ci_calculate_sclk_params()
353 CG_SPLL_SPREAD_SPECTRUM, CLKS, clk_s); in ci_calculate_sclk_params()
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c2948 u32 clk_s, clk_v; in si_init_smc_spll_table() local
2967 clk_s = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM & CLK_S_MASK) >> CLK_S_SHIFT; in si_init_smc_spll_table()
2978 if (clk_s & ~(SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_MASK >> SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT)) in si_init_smc_spll_table()
2991 ((clk_s << SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT) & SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_MASK); in si_init_smc_spll_table()
5312 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in si_calculate_sclk_params() local
5313 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in si_calculate_sclk_params()
5316 cg_spll_spread_spectrum |= CLK_S(clk_s); in si_calculate_sclk_params()