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Searched refs:clk_post (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/phy/
H A Dphy-core-mipi-dphy.c40 cfg->clk_post = 60000 + 52 * ui; in phy_mipi_dphy_calc_config()
120 if (cfg->clk_post < (60000 + 52 * ui)) in phy_mipi_dphy_config_validate()
/linux/include/linux/phy/
H A Dphy-mipi-dphy.h36 unsigned int clk_post; member
/linux/drivers/phy/rockchip/
H A Dphy-rockchip-inno-dsidphy.c412 u32 hs_exit, clk_post, clk_pre, wakeup, lpx, ta_go, ta_sure, ta_wait; in inno_dsidphy_mipi_mode_enable() local
488 clk_post = DIV_ROUND_UP(cfg->clk_post, t_txbyteclkhs); in inno_dsidphy_mipi_mode_enable()
562 T_CLK_POST_CNT_HI(clk_post >> 4)); in inno_dsidphy_mipi_mode_enable()
564 T_CLK_POST_CNT_LO(clk_post)); in inno_dsidphy_mipi_mode_enable()
H A Dphy-rockchip-samsung-dcphy.c315 u8 clk_post; member
1251 val = T_CLK_POST(timing->clk_post); in samsung_mipi_dphy_clk_lane_timing_init()
/linux/drivers/phy/amlogic/
H A Dphy-meson-axg-mipi-dphy.c248 (DIV_ROUND_UP(priv->config.clk_post + in phy_meson_axg_mipi_dphy_power_on()