| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
| H A D | dcn201_clk_mgr.c | 84 static void dcn201_update_clocks(struct clk_mgr *clk_mgr_base, in dcn201_update_clocks() argument
88 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn201_update_clocks()
90 struct dc *dc = clk_mgr_base->ctx->dc; in dcn201_update_clocks()
101 if (clk_mgr_base->clks.dispclk_khz == 0 || in dcn201_update_clocks()
113 dcn2_read_clocks_from_hw_dentist(clk_mgr_base); in dcn201_update_clocks()
116 if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) in dcn201_update_clocks()
117 clk_mgr_base->clks.phyclk_khz = new_clocks->phyclk_khz; in dcn201_update_clocks()
123 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) in dcn201_update_clocks()
124 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn201_update_clocks()
127 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) in dcn201_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| H A D | dcn31_clk_mgr.c | 117 static void dcn31_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context, bool disab… in dcn31_disable_otg_wa() argument
119 struct dc *dc = clk_mgr_base->ctx->dc; in dcn31_disable_otg_wa()
137 void dcn31_update_clocks(struct clk_mgr *clk_mgr_base, in dcn31_update_clocks() argument
142 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn31_update_clocks()
144 struct dc *dc = clk_mgr_base->ctx->dc; in dcn31_update_clocks()
159 new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) { in dcn31_update_clocks()
161 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn31_update_clocks()
164 if (clk_mgr_base->clks.dtbclk_en && !new_clocks->dtbclk_en) { in dcn31_update_clocks()
166 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; in dcn31_update_clocks()
169 if (clk_mgr_base->clks.pwr_state != DCN_PWR_STATE_LOW_POWER) { in dcn31_update_clocks()
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| H A D | dcn31_clk_mgr.h | 45 void dcn31_update_clocks(struct clk_mgr *clk_mgr_base,
54 int dcn31_get_dtb_ref_freq_khz(struct clk_mgr *clk_mgr_base);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| H A D | dcn314_clk_mgr.c | 151 static void dcn314_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context, in dcn314_disable_otg_wa() argument
154 struct dc *dc = clk_mgr_base->ctx->dc; in dcn314_disable_otg_wa()
177 bool dcn314_is_spll_ssc_enabled(struct clk_mgr *clk_mgr_base) in dcn314_is_spll_ssc_enabled() argument
179 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn314_is_spll_ssc_enabled()
208 void dcn314_update_clocks(struct clk_mgr *clk_mgr_base, in dcn314_update_clocks() argument
213 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn314_update_clocks()
215 struct dc *dc = clk_mgr_base->ctx->dc; in dcn314_update_clocks()
231 new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) { in dcn314_update_clocks()
233 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn314_update_clocks()
236 if (clk_mgr_base->clks.dtbclk_en && !new_clocks->dtbclk_en) { in dcn314_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.c | 189 void dcn35_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context, in dcn35_disable_otg_wa() argument
192 struct dc *dc = clk_mgr_base->ctx->dc; in dcn35_disable_otg_wa()
201 struct clk_mgr_internal *clk_mgr_internal = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn35_disable_otg_wa()
355 static void dcn35_notify_host_router_bw(struct clk_mgr *clk_mgr_base, struct dc_state *context, in dcn35_notify_host_router_bw() argument
359 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn35_notify_host_router_bw()
384 …if (should_set_clock(safe_to_lower, new_clocks->host_router_bw_kbps[i], clk_mgr_base->clks.host_ro… in dcn35_notify_host_router_bw()
385 clk_mgr_base->clks.host_router_bw_kbps[i] = new_clocks->host_router_bw_kbps[i]; in dcn35_notify_host_router_bw()
391 void dcn35_update_clocks(struct clk_mgr *clk_mgr_base, in dcn35_update_clocks() argument
396 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn35_update_clocks()
398 struct dc *dc = clk_mgr_base->ctx->dc; in dcn35_update_clocks()
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| H A D | dcn35_clk_mgr.h | 52 void dcn35_update_clocks(struct clk_mgr *clk_mgr_base,
68 void dcn35_disable_otg_wa(struct clk_mgr *clk_mgr_base,
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| H A D | dcn30m_clk_mgr.c | 31 uint32_t dcn30m_set_smartmux_switch(struct clk_mgr *clk_mgr_base, uint32_t pins_to_set) in dcn30m_set_smartmux_switch() argument
33 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn30m_set_smartmux_switch()
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| H A D | dcn30m_clk_mgr.h | 29 uint32_t dcn30m_set_smartmux_switch(struct clk_mgr *clk_mgr_base, uint32_t pins_to_set);
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| H A D | dcn30_clk_mgr.h | 89 void dcn3_init_clocks(struct clk_mgr *clk_mgr_base);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/ |
| H A D | dce112_clk_mgr.h | 35 int dce112_set_clock(struct clk_mgr *clk_mgr_base, int requested_clk_khz);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| H A D | dcn32_clk_mgr.h | 28 void dcn32_init_clocks(struct clk_mgr *clk_mgr_base);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| H A D | dcn20_clk_mgr.h | 56 void dcn2_read_clocks_from_hw_dentist(struct clk_mgr *clk_mgr_base);
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