Searched refs:clk_en (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/staging/greybus/ |
| H A D | arche-apb-ctrl.c | 39 struct gpio_desc *clk_en; member
102 if (apb->clk_en) in coldboot_seq()
103 gpiod_set_value(apb->clk_en, 1); in coldboot_seq()
205 if (apb->clk_en) in poweroff_seq()
206 gpiod_set_value(apb->clk_en, 0); in poweroff_seq()
346 apb->clk_en = devm_gpiod_get_optional(dev, "clock-en", GPIOD_OUT_LOW); in apb_ctrl_get_fw_data()
347 if (IS_ERR(apb->clk_en)) { in apb_ctrl_get_fw_data()
348 ret = PTR_ERR(apb->clk_en); in apb_ctrl_get_fw_data()
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| /linux/drivers/hwmon/ |
| H A D | aspeed-g6-pwm-tach.c | 154 bool polarity, pin_en, clk_en; in aspeed_pwm_get_state() local
161 clk_en = FIELD_GET(PWM_ASPEED_CTRL_CLK_ENABLE, val); in aspeed_pwm_get_state()
175 if (clk_en && duty_pt) { in aspeed_pwm_get_state()
180 state->duty_cycle = clk_en ? state->period : 0; in aspeed_pwm_get_state()
193 bool clk_en; in aspeed_pwm_apply() local
241 clk_en = 0; in aspeed_pwm_apply()
243 clk_en = 1; in aspeed_pwm_apply()
260 FIELD_PREP(PWM_ASPEED_CTRL_CLK_ENABLE, clk_en) | in aspeed_pwm_apply()
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn20/ |
| H A D | dcn20_dccg.c | 82 uint32_t clk_en = 0; in dccg2_get_dccg_ref_freq() local
85 REG_GET_2(REFCLK_CNTL, REFCLK_CLOCK_EN, &clk_en, REFCLK_SRC_SEL, &clk_sel); in dccg2_get_dccg_ref_freq()
87 if (clk_en != 0) { in dccg2_get_dccg_ref_freq()
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| /linux/drivers/spi/ |
| H A D | spi-nxp-fspi.c | 463 struct clk *clk, *clk_en; member
707 ret = clk_prepare_enable(f->clk_en); in nxp_fspi_clk_prep_enable()
713 clk_disable_unprepare(f->clk_en); in nxp_fspi_clk_prep_enable()
726 clk_disable_unprepare(f->clk_en); in nxp_fspi_clk_disable_unprep()
1442 f->clk_en = devm_clk_get(dev, "fspi_en"); in nxp_fspi_probe()
1443 if (IS_ERR(f->clk_en)) in nxp_fspi_probe()
1444 return PTR_ERR(f->clk_en); in nxp_fspi_probe()
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