Searched refs:clk_en (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/hwmon/ |
| H A D | aspeed-g6-pwm-tach.c | 154 bool polarity, pin_en, clk_en; in aspeed_pwm_get_state() local
161 clk_en = FIELD_GET(PWM_ASPEED_CTRL_CLK_ENABLE, val); in aspeed_pwm_get_state()
175 if (clk_en && duty_pt) { in aspeed_pwm_get_state()
180 state->duty_cycle = clk_en ? state->period : 0; in aspeed_pwm_get_state()
193 bool clk_en; in aspeed_pwm_apply() local
241 clk_en = 0; in aspeed_pwm_apply()
243 clk_en = 1; in aspeed_pwm_apply()
260 FIELD_PREP(PWM_ASPEED_CTRL_CLK_ENABLE, clk_en) | in aspeed_pwm_apply()
|
| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn20/ |
| H A D | dcn20_dccg.c | 82 uint32_t clk_en = 0; in dccg2_get_dccg_ref_freq() local
85 REG_GET_2(REFCLK_CNTL, REFCLK_CLOCK_EN, &clk_en, REFCLK_SRC_SEL, &clk_sel); in dccg2_get_dccg_ref_freq()
87 if (clk_en != 0) { in dccg2_get_dccg_ref_freq()
|
| /linux/drivers/iio/adc/ |
| H A D | sc27xx_adc.c | 106 u32 clk_en; member
774 ret = regmap_set_bits(data->regmap, data->var_data->clk_en, in sc27xx_adc_enable()
791 regmap_clear_bits(data->regmap, data->var_data->clk_en, in sc27xx_adc_enable()
805 regmap_clear_bits(data->regmap, data->var_data->clk_en, in sc27xx_adc_disable()
814 .clk_en = SC2731_ARM_CLK_EN,
826 .clk_en = SC2730_ARM_CLK_EN,
838 .clk_en = SC2721_ARM_CLK_EN,
850 .clk_en = SC2721_ARM_CLK_EN,
|