Searched refs:clk_cfg1 (Results 1 – 1 of 1) sorted by relevance
201 u16 clk_cfg1 = dib7000m_read_word(state, 909) & 0xfffd; in dib7000m_set_output_mode() local203 clk_cfg1 |= (1 << 1); // P_O_CLK_en in dib7000m_set_output_mode()204 dib7000m_write_word(state, 909, clk_cfg1); in dib7000m_set_output_mode()428 u16 clk_cfg1; in dib7000mc_reset_pll() local435 clk_cfg1 = (0 << 14) | (3 << 12) |(0 << 11) | in dib7000mc_reset_pll()438 dib7000m_write_word(state, 908, clk_cfg1); in dib7000mc_reset_pll()439 clk_cfg1 = (clk_cfg1 & 0xfff7) | (bw->pll_bypass << 3); in dib7000mc_reset_pll()440 dib7000m_write_word(state, 908, clk_cfg1); in dib7000mc_reset_pll()