Searched refs:clidr (Results 1 – 5 of 5) sorted by relevance
| /linux/arch/arm64/kernel/ |
| H A D | cacheinfo.c | 26 u64 clidr; in get_cache_type() local 30 clidr = read_sysreg(clidr_el1); in get_cache_type() 31 return CLIDR_CTYPE(clidr, level); in get_cache_type()
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| /linux/tools/testing/selftests/kvm/arm64/ |
| H A D | set_id_regs.c | 705 #define CLIDR_CTYPE(clidr, level) \ argument 706 (((clidr) & CLIDR_CTYPE_MASK(level)) >> CLIDR_CTYPE_SHIFT(level)) 710 u64 clidr; in test_clidr() local 713 clidr = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_CLIDR_EL1)); in test_clidr() 717 if (!CLIDR_CTYPE(clidr, level)) in test_clidr() 728 clidr |= BIT(2) << CLIDR_CTYPE_SHIFT(level); in test_clidr() 730 vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_CLIDR_EL1), clidr); in test_clidr() 731 test_reg_vals[encoding_to_range_idx(SYS_CLIDR_EL1)] = clidr; in test_clidr()
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| /linux/arch/arm/mm/ |
| H A D | cache-v7.S | 101 mrc p15, 1, r0, c0, c0, 1 @ read clidr, r0 = clidr 104 ands r3, r3, #7 << 1 @ extract LoU*2 field from clidr 129 mrc p15, 1, r0, c0, c0, 1 @ read clidr 131 ands r3, r3, #7 << 1 @ extract LoC*2 from clidr 137 mov r1, r0, lsr r2 @ extract cache type bits from clidr
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| H A D | cache-v7m.S | 179 ands r3, r3, #7 << 1 @ extract LoC*2 from clidr 185 mov r1, r0, lsr r2 @ extract cache type bits from clidr
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| /linux/arch/arm64/kvm/ |
| H A D | sys_regs.c | 2515 u64 clidr; in reset_clidr() local 2528 clidr = CACHE_TYPE_UNIFIED << CLIDR_CTYPE_SHIFT(loc); in reset_clidr() 2536 clidr = 1 << CLIDR_LOUU_SHIFT; in reset_clidr() 2537 clidr |= 1 << CLIDR_LOUIS_SHIFT; in reset_clidr() 2538 clidr |= CACHE_TYPE_DATA << CLIDR_CTYPE_SHIFT(1); in reset_clidr() 2547 clidr |= CACHE_TYPE_INST << CLIDR_CTYPE_SHIFT(1); in reset_clidr() 2549 clidr |= loc << CLIDR_LOC_SHIFT; in reset_clidr() 2557 clidr |= 2ULL << CLIDR_TTYPE_SHIFT(loc); in reset_clidr() 2559 __vcpu_assign_sys_reg(vcpu, r->reg, clidr); in reset_clidr()
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