Home
last modified time | relevance | path

Searched refs:class2 (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dr600_dpm.h132 void r600_dpm_print_class_info(u32 class, u32 class2);
138 bool r600_is_uvd_state(u32 class, u32 class2);
H A Dr600_dpm.c67 void r600_dpm_print_class_info(u32 class, u32 class2) in r600_dpm_print_class_info() argument
90 (class2 == 0)) in r600_dpm_print_class_info()
119 if (class2 & ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2) in r600_dpm_print_class_info()
121 if (class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) in r600_dpm_print_class_info()
123 if (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC) in r600_dpm_print_class_info()
722 bool r600_is_uvd_state(u32 class, u32 class2) in r600_is_uvd_state() argument
732 if (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC) in r600_is_uvd_state()
H A Drs780_dpm.c724 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in rs780_parse_pplib_non_clock_info()
734 if (r600_is_uvd_state(rps->class, rps->class2)) { in rs780_parse_pplib_non_clock_info()
942 r600_dpm_print_class_info(rps->class, rps->class2); in rs780_dpm_print_power_state()
H A Dsumo_dpm.c826 !r600_is_uvd_state(new_rps->class, new_rps->class2)) in sumo_setup_uvd_clocks()
1140 (new_rps->class2 & ATOM_PPLIB_CLASSIFICATION2_MVC)) in sumo_apply_state_adjust_rules()
1409 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in sumo_parse_pplib_non_clock_info()
1801 r600_dpm_print_class_info(rps->class, rps->class2); in sumo_dpm_print_power_state()
H A Dtrinity_dpm.c1430 if (pi->uvd_dpm && r600_is_uvd_state(rps->class, rps->class2)) { in trinity_adjust_uvd_state()
1641 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in trinity_parse_pplib_non_clock_info()
1970 r600_dpm_print_class_info(rps->class, rps->class2); in trinity_dpm_print_power_state()
H A Drv770_dpm.c2152 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in rv7xx_parse_pplib_non_clock_info()
2162 if (r600_is_uvd_state(rps->class, rps->class2)) { in rv7xx_parse_pplib_non_clock_info()
2236 if (rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) { in rv7xx_parse_pplib_clock_info()
2439 r600_dpm_print_class_info(rps->class, rps->class2); in rv770_dpm_print_power_state()
H A Dni_dpm.c2608 if (!r600_is_uvd_state(radeon_new_state->class, radeon_new_state->class2)) { in ni_enable_power_containment()
3387 if (!r600_is_uvd_state(radeon_new_state->class, radeon_new_state->class2)) { in ni_enable_smc_cac()
3901 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in ni_parse_pplib_non_clock_info()
3906 } else if (r600_is_uvd_state(rps->class, rps->class2)) { in ni_parse_pplib_non_clock_info()
3955 if (rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) { in ni_parse_pplib_clock_info()
4286 r600_dpm_print_class_info(rps->class, rps->class2); in ni_dpm_print_power_state()
H A Drv6xx_dpm.c1800 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in rv6xx_parse_pplib_non_clock_info()
1802 if (r600_is_uvd_state(rps->class, rps->class2)) { in rv6xx_parse_pplib_non_clock_info()
2012 r600_dpm_print_class_info(rps->class, rps->class2); in rv6xx_dpm_print_power_state()
H A Dbtc_dpm.c1668 if (r600_is_uvd_state(radeon_new_state->class, radeon_new_state->class2)) in btc_set_at_for_uvd()
1690 if (r600_is_uvd_state(radeon_new_state->class, radeon_new_state->class2)) { in btc_notify_uvd_to_smc()
H A Dkv_dpm.c2388 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in kv_parse_pplib_non_clock_info()
2649 r600_dpm_print_class_info(rps->class, rps->class2); in kv_dpm_print_power_state()
H A Dsi_dpm.c6654 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in si_parse_pplib_non_clock_info()
6659 } else if (r600_is_uvd_state(rps->class, rps->class2)) { in si_parse_pplib_non_clock_info()
6712 if ((rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) && in si_parse_pplib_clock_info()
H A Dci_dpm.c5402 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in ci_parse_pplib_non_clock_info()
5445 if (rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) { in ci_parse_pplib_clock_info()
5915 r600_dpm_print_class_info(rps->class, rps->class2); in ci_dpm_print_power_state()
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dlegacy_dpm.c50 void amdgpu_dpm_dbg_print_class_info(struct amdgpu_device *adev, u32 class, u32 class2) in amdgpu_dpm_dbg_print_class_info() argument
71 (class2 == 0)) in amdgpu_dpm_dbg_print_class_info()
88 (class2 & ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2) ? " limited_pwr2" : "", in amdgpu_dpm_dbg_print_class_info()
89 (class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) ? " ulv" : "", in amdgpu_dpm_dbg_print_class_info()
90 (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC) ? " uvd_mvc" : ""); in amdgpu_dpm_dbg_print_class_info()
834 if (ps->class2 & ATOM_PPLIB_CLASSIFICATION2_MVC) in amdgpu_dpm_pick_power_state()
848 if (ps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) in amdgpu_dpm_pick_power_state()
H A Dsi_dpm.c3390 static bool r600_is_uvd_state(u32 class, u32 class2) in r600_is_uvd_state() argument
3400 if (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC) in r600_is_uvd_state()
7210 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in si_parse_pplib_non_clock_info()
7215 } else if (r600_is_uvd_state(rps->class, rps->class2)) { in si_parse_pplib_non_clock_info()
7268 if ((rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) && in si_parse_pplib_clock_info()
7978 amdgpu_dpm_dbg_print_class_info(adev, rps->class, rps->class2); in si_dpm_print_power_state()
H A Dkv_dpm.c2653 rps->class2 = le16_to_cpu(non_clock_info->usClassification2); in kv_parse_pplib_non_clock_info()
2888 amdgpu_dpm_dbg_print_class_info(adev, rps->class, rps->class2); in kv_dpm_print_power_state()
/linux/drivers/scsi/bfa/
H A Dbfa_fc.h351 struct fc_plogi_clp_s class2; /* class 2 service parameters */ member
/linux/arch/x86/kvm/
H A Dx86.c842 int class1, class2; in kvm_multiple_exception() local
881 class2 = exception_class(nr); in kvm_multiple_exception()
882 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY) || in kvm_multiple_exception()
883 (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) { in kvm_multiple_exception()