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Searched refs:chno (Results 1 – 15 of 15) sorted by relevance

/linux/arch/powerpc/platforms/pasemi/
H A Ddma_lib.c176 int chno; in pasemi_dma_alloc_chan() local
190 chno = pasemi_alloc_rx_chan(); in pasemi_dma_alloc_chan()
191 chan->chno = chno; in pasemi_dma_alloc_chan()
193 base_hw_irq + num_txch + chno); in pasemi_dma_alloc_chan()
194 chan->status = &dma_status->rx_sta[chno]; in pasemi_dma_alloc_chan()
197 chno = pasemi_alloc_tx_chan(type); in pasemi_dma_alloc_chan()
198 chan->chno = chno; in pasemi_dma_alloc_chan()
199 chan->irq = irq_create_mapping(NULL, base_hw_irq + chno); in pasemi_dma_alloc_chan()
200 chan->status = &dma_status->tx_sta[chno]; in pasemi_dma_alloc_chan()
223 pasemi_free_rx_chan(chan->chno); in pasemi_dma_free_chan()
[all …]
/linux/drivers/gpu/drm/imx/ipuv3/
H A Dimx-ldb.c74 int chno; member
120 if (imx_ldb_ch->chno == 0 || dual) in imx_ldb_ch_set_bus_format()
122 if (imx_ldb_ch->chno == 1 || dual) in imx_ldb_ch_set_bus_format()
126 if (imx_ldb_ch->chno == 0 || dual) in imx_ldb_ch_set_bus_format()
129 if (imx_ldb_ch->chno == 1 || dual) in imx_ldb_ch_set_bus_format()
168 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno, in imx_ldb_set_clock() argument
174 clk_get_rate(ldb->clk_pll[chno]), serial_clk); in imx_ldb_set_clock()
175 clk_set_rate(ldb->clk_pll[chno], serial_clk); in imx_ldb_set_clock()
178 clk_get_rate(ldb->clk_pll[chno])); in imx_ldb_set_clock()
181 clk_get_rate(ldb->clk[chno]), in imx_ldb_set_clock()
[all …]
/linux/drivers/gpu/ipu-v3/
H A Dipu-smfc.c19 int chno; member
44 shift = smfc->chno * 4; in ipu_smfc_set_burstsize()
64 shift = smfc->chno * 3; in ipu_smfc_map_channel()
84 shift = smfc->chno * 6 + (smfc->chno > 1 ? 4 : 0); in ipu_smfc_set_watermark()
135 struct ipu_smfc *ipu_smfc_get(struct ipu_soc *ipu, unsigned int chno) in ipu_smfc_get() argument
141 if (chno >= 4) in ipu_smfc_get()
144 smfc = &priv->channel[chno]; in ipu_smfc_get()
192 priv->channel[i].chno = i; in ipu_smfc_init()
H A Dipu-common.c266 unsigned int chno = channel->num; in __ipu_idmac_reset_current_buffer() local
268 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_CUR_BUF(chno)); in __ipu_idmac_reset_current_buffer()
425 unsigned int chno = channel->num; in ipu_idmac_get_current_buffer() local
427 return (ipu_cm_read(ipu, IPU_CHA_CUR_BUF(chno)) & idma_mask(chno)) ? 1 : 0; in ipu_idmac_get_current_buffer()
458 unsigned int chno = channel->num; in ipu_idmac_select_buffer() local
465 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF0_RDY(chno)); in ipu_idmac_select_buffer()
467 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF1_RDY(chno)); in ipu_idmac_select_buffer()
476 unsigned int chno = channel->num; in ipu_idmac_clear_buffer() local
484 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF0_RDY(chno)); in ipu_idmac_clear_buffer()
487 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF1_RDY(chno)); in ipu_idmac_clear_buffer()
[all …]
H A Dipu-dc.c94 int chno; member
366 priv->channels[i].chno = i; in ipu_dc_init()
H A Dipu-cpmem.c893 int chno = ch->num; in ipu_cpmem_dump() local
895 dev_dbg(ipu->dev, "ch %d word 0 - %08X %08X %08X %08X %08X\n", chno, in ipu_cpmem_dump()
901 dev_dbg(ipu->dev, "ch %d word 1 - %08X %08X %08X %08X %08X\n", chno, in ipu_cpmem_dump()
H A Dipu-prv.h219 bool ipu_idmac_channel_busy(struct ipu_soc *ipu, unsigned int chno);
/linux/drivers/gpu/drm/bridge/imx/
H A Dimx8qm-ldb.c140 u32 chno = ldb_ch->chno; in imx8qm_ldb_bridge_mode_set() local
171 if (ldb_ch->chno == 0 || is_split) in imx8qm_ldb_bridge_mode_set()
173 if (ldb_ch->chno == 1 || is_split) in imx8qm_ldb_bridge_mode_set()
181 if (ldb_ch->chno == 0 || is_split) in imx8qm_ldb_bridge_mode_set()
183 if (ldb_ch->chno == 1 || is_split) in imx8qm_ldb_bridge_mode_set()
191 regmap_update_bits(ldb->regmap, SS_CTRL, CH_VSYNC_M(chno), 0); in imx8qm_ldb_bridge_mode_set()
194 CH_VSYNC_M(chno), CH_PVSYNC(chno)); in imx8qm_ldb_bridge_mode_set()
197 regmap_update_bits(ldb->regmap, SS_CTRL, CH_HSYNC_M(chno), 0); in imx8qm_ldb_bridge_mode_set()
200 CH_HSYNC_M(chno), CH_PHSYNC(chno)); in imx8qm_ldb_bridge_mode_set()
220 if (ldb_ch->chno == 0 || is_split) { in imx8qm_ldb_bridge_atomic_enable()
[all …]
H A Dimx8qxp-ldb.c140 u32 chno = ldb_ch->chno; in imx8qxp_ldb_bridge_mode_set() local
170 if (chno == 0) in imx8qxp_ldb_bridge_mode_set()
191 regmap_update_bits(ldb->regmap, SS_CTRL, CH_VSYNC_M(chno), 0); in imx8qxp_ldb_bridge_mode_set()
194 CH_VSYNC_M(chno), CH_PVSYNC(chno)); in imx8qxp_ldb_bridge_mode_set()
197 regmap_update_bits(ldb->regmap, SS_CTRL, CH_HSYNC_M(chno), 0); in imx8qxp_ldb_bridge_mode_set()
200 CH_HSYNC_M(chno), CH_PHSYNC(chno)); in imx8qxp_ldb_bridge_mode_set()
237 if (ldb_ch->chno == 0 || is_split) { in imx8qxp_ldb_bridge_atomic_enable()
242 if (ldb_ch->chno == 1 || is_split) { in imx8qxp_ldb_bridge_atomic_enable()
452 if ((link == DRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS && ldb_ch->chno != 0) || in imx8qxp_ldb_check_chno_and_dual_link()
453 (link == DRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS && ldb_ch->chno != 1)) in imx8qxp_ldb_check_chno_and_dual_link()
[all …]
H A Dimx-ldb-helper.c62 if (ldb_ch->chno == 0 || is_split) in ldb_bridge_mode_set_helper()
64 if (ldb_ch->chno == 1 || is_split) in ldb_bridge_mode_set_helper()
68 if (ldb_ch->chno == 0 || is_split) in ldb_bridge_mode_set_helper()
71 if (ldb_ch->chno == 1 || is_split) in ldb_bridge_mode_set_helper()
98 if (ldb_ch->chno == 0 || is_split) in ldb_bridge_disable_helper()
100 if (ldb_ch->chno == 1 || is_split) in ldb_bridge_disable_helper()
155 ldb_ch->chno = i; in ldb_init_helper()
H A Dimx-ldb-helper.h50 u32 chno; member
/linux/drivers/net/ethernet/pasemi/
H A Dpasemi_mac.c271 int chno; in pasemi_mac_setup_csring() local
281 chno = ring->chan.chno; in pasemi_mac_setup_csring()
290 write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno), in pasemi_mac_setup_csring()
295 write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno), val); in pasemi_mac_setup_csring()
316 write_dma_reg(PAS_DMA_TXCHAN_CFG(chno), cfg); in pasemi_mac_setup_csring()
368 int chno; in pasemi_mac_setup_rx_resources() local
378 chno = ring->chan.chno; in pasemi_mac_setup_rx_resources()
400 write_dma_reg(PAS_DMA_RXCHAN_BASEL(chno), in pasemi_mac_setup_rx_resources()
403 write_dma_reg(PAS_DMA_RXCHAN_BASEU(chno), in pasemi_mac_setup_rx_resources()
412 write_dma_reg(PAS_DMA_RXCHAN_CFG(chno), cfg); in pasemi_mac_setup_rx_resources()
[all …]
/linux/drivers/dma/
H A Dimx-dma.c407 int chno = imxdmac->channel; in dma_irq_handle_channel() local
429 tmp = imx_dmav1_readl(imxdma, DMA_CCR(chno)); in dma_irq_handle_channel()
439 imx_dmav1_writel(imxdma, tmp, DMA_CCR(chno)); in dma_irq_handle_channel()
442 DMA_CCR(chno)); in dma_irq_handle_channel()
446 imx_dmav1_writel(imxdma, tmp, DMA_CCR(chno)); in dma_irq_handle_channel()
462 imx_dmav1_writel(imxdma, 0, DMA_CCR(chno)); in dma_irq_handle_channel()
/linux/arch/powerpc/include/asm/
H A Dpasemi_dma.h471 int chno; /* Channel number */ member
/linux/include/video/
H A Dimx-ipu-v3.h479 struct ipu_smfc *ipu_smfc_get(struct ipu_soc *ipu, unsigned int chno);