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Searched refs:channel_width (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/staging/rtl8723bs/include/
H A Dhal_com_phycfg.h80 enum channel_width BandWidth, u8 Channel,
91 enum channel_width BandWidth, u8 Channel);
94 enum channel_width Bandwidth, u8 RfPath, u8 DataRate,
H A Drtl8723b_rf.h15 enum channel_width Bandwidth);
H A Drtw_rf.h80 enum channel_width { enum
H A Dhal_data.h177 enum channel_width CurrentChannelBW;
/linux/drivers/gpu/drm/i915/display/
H A Dintel_bw.c69 u8 channel_width; member
261 qi->channel_width = 64; in icl_get_qgv_points()
267 qi->channel_width = 32; in icl_get_qgv_points()
274 qi->channel_width = 16; in icl_get_qgv_points()
279 qi->channel_width = 32; in icl_get_qgv_points()
290 qi->channel_width = 64; in icl_get_qgv_points()
296 qi->channel_width = 32; in icl_get_qgv_points()
303 qi->channel_width = 32; in icl_get_qgv_points()
311 qi->channel_width = 16; in icl_get_qgv_points()
561 peakbw = num_channels * DIV_ROUND_UP(qi.channel_width, 8) * dclk_max; in tgl_get_bw_info()
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/linux/drivers/net/wireless/rsi/
H A Drsi_91x_mgmt.c276 common->channel_width = BW_20MHZ; in rsi_set_default_parameters()
403 if (common->channel_width == BW_40MHZ) { in rsi_load_radio_caps()
428 common->channel_width == BW_20MHZ) in rsi_load_radio_caps()
741 vap_caps->channel_bw = common->channel_width; in rsi_set_vap_capabilities()
933 if (common->channel_width == BW_40MHZ) { in rsi_load_bootup_params()
983 if (common->channel_width == BW_40MHZ) { in rsi_load_9116_bootup_params()
1064 u8 prev_bw = common->channel_width; in rsi_band_check()
1075 common->channel_width = BW_20MHZ; in rsi_band_check()
1077 common->channel_width = BW_40MHZ; in rsi_band_check()
1080 if (common->channel_width) in rsi_band_check()
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H A Drsi_main.h262 u8 channel_width; member
H A Drsi_mgmt.h405 u8 channel_width; member
/linux/drivers/staging/rtl8723bs/hal/
H A Drtl8723b_rf6052.c58 struct adapter *Adapter, enum channel_width Bandwidth in PHY_RF6052SetBandwidth8723B()
/linux/drivers/gpu/drm/amd/display/dc/bios/
H A Dbios_parser2.c2414 info->dram_channel_width_bytes = (1 << info_v23->vram_module[0].channel_width) / 8; in get_vram_info_v23()
2433 info->dram_channel_width_bytes = (1 << info_v24->vram_module[0].channel_width) / 8; in get_vram_info_v24()
2452 info->dram_channel_width_bytes = (1 << info_v25->vram_module[0].channel_width) / 8; in get_vram_info_v25()
2471 info->dram_channel_width_bytes = (1 << info_v30->channel_width) / 8; in get_vram_info_v30()
2490 info->dram_channel_width_bytes = (1 << info_v40->channel_width) / 8; in get_vram_info_from_umc_info_v40()
/linux/net/mac80211/
H A Dtrace.h511 __field(u32, channel_width)
541 __entry->channel_width = link_conf->chanreq.oper.width;