Searched refs:channel_status (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/firmware/arm_scmi/ |
| H A D | shmem.c | 28 __le32 channel_status; member
110 spin_until_cond((ioread32(&shmem->channel_status) & in shmem_tx_prepare()
113 if (!(ioread32(&shmem->channel_status) & in shmem_tx_prepare()
122 iowrite32(0x0, &shmem->channel_status); in shmem_tx_prepare()
165 iowrite32(SCMI_SHMEM_CHAN_STAT_CHANNEL_FREE, &shmem->channel_status); in shmem_clear_channel()
178 return ioread32(&shmem->channel_status) & in shmem_poll_done()
185 return (ioread32(&shmem->channel_status) & in shmem_channel_free()
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| /linux/drivers/gpu/drm/bridge/synopsys/ |
| H A D | dw-hdmi-qp.c | 408 u8 *channel_status, bool ref2stream) in dw_hdmi_qp_set_channel_status() argument
430 channel_status[0] |= IEC958_AES0_NONAUDIO; in dw_hdmi_qp_set_channel_status()
434 channel_status[3] = (channel_status[3] & 0xf0) | IEC958_AES3_CON_FS_768000; in dw_hdmi_qp_set_channel_status()
435 channel_status[4] = (channel_status[4] & 0x0f) | IEC958_AES4_CON_ORIGFS_NOTID; in dw_hdmi_qp_set_channel_status()
438 dw_hdmi_qp_write(hdmi, channel_status[0] | (channel_status[1] << 8), in dw_hdmi_qp_set_channel_status()
441 regmap_bulk_write(hdmi->regm, AUDPKT_CHSTATUS_OVR1, &channel_status[3], 1); in dw_hdmi_qp_set_channel_status()
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| /linux/drivers/media/dvb-frontends/ |
| H A D | dib9000.c | 60 struct dvb_frontend_parametersContext channel_status; member
1479 int ret = 10, search = state->channel_status.status == CHANNEL_STATUS_PARAMETERS_UNKNOWN; in dib9000_fw_tune()
1984 …_set_channel_status(struct dvb_frontend *fe, struct dvb_frontend_parametersContext *channel_status) in dib9000_set_channel_status() argument
1988 memcpy(&state->channel_status, channel_status, sizeof(struct dvb_frontend_parametersContext)); in dib9000_set_channel_status()
1998 struct dvb_frontend_parametersContext channel_status; in dib9000_set_frontend() local
2025 state->channel_status.status = CHANNEL_STATUS_PARAMETERS_UNKNOWN; in dib9000_set_frontend()
2027 state->channel_status.status = CHANNEL_STATUS_PARAMETERS_SET; in dib9000_set_frontend()
2039 dib9000_set_channel_status(state->fe[index_frontend], &state->channel_status); in dib9000_set_frontend()
2095 channel_status.status = CHANNEL_STATUS_PARAMETERS_SET; in dib9000_set_frontend()
2099 dib9000_set_channel_status(state->fe[index_frontend], &channel_status); in dib9000_set_frontend()
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| /linux/drivers/gpu/drm/mediatek/ |
| H A D | mtk_hdmi.c | 397 u8 *channel_status) in mtk_hdmi_hw_aud_set_channel_status() argument
402 regmap_write(hdmi->regs, GRL_I2S_C_STA0 + i * 4, channel_status[i]); in mtk_hdmi_hw_aud_set_channel_status()
403 regmap_write(hdmi->regs, GRL_L_STATUS_0 + i * 4, channel_status[i]); in mtk_hdmi_hw_aud_set_channel_status()
404 regmap_write(hdmi->regs, GRL_R_STATUS_0 + i * 4, channel_status[i]); in mtk_hdmi_hw_aud_set_channel_status()
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