| /linux/drivers/staging/most/dim2/ |
| H A D | hal.c | 68 u8 ch_addr; member
214 static void dim2_configure_cat(u8 cat_base, u8 ch_addr, u8 ch_type, in dim2_configure_cat() argument
222 (ch_addr << CAT_CL_SHIFT) | in dim2_configure_cat()
227 u8 const ctr_addr = cat_base + ch_addr / 8; in dim2_configure_cat()
228 u8 const idx = (ch_addr % 8) / 2; in dim2_configure_cat()
229 u8 const shift = (ch_addr % 2) * 16; in dim2_configure_cat()
238 static void dim2_clear_cat(u8 cat_base, u8 ch_addr) in dim2_clear_cat() argument
240 u8 const ctr_addr = cat_base + ch_addr / 8; in dim2_clear_cat()
241 u8 const idx = (ch_addr % 8) / 2; in dim2_clear_cat()
242 u8 const shift = (ch_addr % 2) * 16; in dim2_clear_cat()
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| /linux/drivers/net/phy/mediatek/ |
| H A D | mtk-phy-lib.c | 14 static void __mtk_tr_access(struct phy_device *phydev, bool read, u8 ch_addr, in __mtk_tr_access() argument
22 tr_cmd |= (((ch_addr & 0x3) << 11) | in __mtk_tr_access()
29 static void __mtk_tr_read(struct phy_device *phydev, u8 ch_addr, u8 node_addr, in __mtk_tr_read() argument
32 __mtk_tr_access(phydev, true, ch_addr, node_addr, data_addr); in __mtk_tr_read()
39 static void __mtk_tr_write(struct phy_device *phydev, u8 ch_addr, u8 node_addr, in __mtk_tr_write() argument
46 __mtk_tr_access(phydev, false, ch_addr, node_addr, data_addr); in __mtk_tr_write()
49 void __mtk_tr_modify(struct phy_device *phydev, u8 ch_addr, u8 node_addr, in __mtk_tr_modify() argument
56 __mtk_tr_read(phydev, ch_addr, node_addr, data_addr, &tr_high, &tr_low); in __mtk_tr_modify()
59 __mtk_tr_write(phydev, ch_addr, node_addr, data_addr, tr_data); in __mtk_tr_modify()
63 void mtk_tr_modify(struct phy_device *phydev, u8 ch_addr, u8 node_addr, in mtk_tr_modify() argument
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| H A D | mtk.h | 75 void __mtk_tr_modify(struct phy_device *phydev, u8 ch_addr, u8 node_addr,
77 void mtk_tr_modify(struct phy_device *phydev, u8 ch_addr, u8 node_addr,
79 void __mtk_tr_set_bits(struct phy_device *phydev, u8 ch_addr, u8 node_addr,
81 void __mtk_tr_clr_bits(struct phy_device *phydev, u8 ch_addr, u8 node_addr,
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| /linux/drivers/iio/adc/ |
| H A D | ad7292.c | 211 unsigned int ch_addr; in ad7292_read_raw() local
216 ch_addr = AD7292_REG_ADC_CH(chan->channel); in ad7292_read_raw()
217 ret = ad7292_single_conversion(st, ch_addr); in ad7292_read_raw()
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| H A D | ad7606.c | 1269 unsigned int ch_addr, mode, ch_index; in ad7616_write_scale_sw() local
1280 ch_addr = AD7616_RANGE_CH_ADDR(ch_index); in ad7616_write_scale_sw()
1283 ch_addr += AD7616_RANGE_CH_A_ADDR_OFF; in ad7616_write_scale_sw()
1285 ch_addr += AD7616_RANGE_CH_B_ADDR_OFF; in ad7616_write_scale_sw()
1290 return ad7606_write_mask(st, ch_addr, AD7616_RANGE_CH_MSK(ch_index), in ad7616_write_scale_sw()
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| /linux/drivers/edac/ |
| H A D | sb_edac.c | 2052 u64 ch_addr, offset, limit = 0, prv = 0; in get_memory_error_data() local
2297 ch_addr = addr - offset; in get_memory_error_data()
2298 ch_addr >>= (6 + shiftup); in get_memory_error_data()
2299 ch_addr /= sck_xch; in get_memory_error_data()
2300 ch_addr <<= (6 + shiftup); in get_memory_error_data()
2301 ch_addr |= addr & ((1 << (6 + shiftup)) - 1); in get_memory_error_data()
2319 if (ch_addr <= limit) in get_memory_error_data()
2324 ch_addr); in get_memory_error_data()
2330 idx = (ch_addr >> 6); in get_memory_error_data()
2332 idx = (ch_addr >> 13); /* FIXME: Datasheet says to shift by 15 */ in get_memory_error_data()
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| /linux/drivers/net/ethernet/chelsio/cxgb/ |
| H A D | espi.c | 52 int ch_addr, int reg_offset, u32 wr_data) in tricn_write() argument
58 V_CHANNEL_ADDR(ch_addr) | V_MODULE_ADDR(module_addr) | in tricn_write()
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