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Searched refs:cg_spll_spread_spectrum_2 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Drv740_dpm.c128 u32 cg_spll_spread_spectrum_2 = pi->clk_regs.rv770.cg_spll_spread_spectrum_2; in rv740_populate_sclk_value() local
170 cg_spll_spread_spectrum_2 &= ~CLK_V_MASK; in rv740_populate_sclk_value()
171 cg_spll_spread_spectrum_2 |= CLK_V(clk_v); in rv740_populate_sclk_value()
180 sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cpu_to_be32(cg_spll_spread_spectrum_2); in rv740_populate_sclk_value()
299 pi->clk_regs.rv770.cg_spll_spread_spectrum_2 = in rv740_read_clock_registers()
H A Drv730_dpm.c47 u32 cg_spll_spread_spectrum_2 = pi->clk_regs.rv730.cg_spll_spread_spectrum_2; in rv730_populate_sclk_value() local
101 cg_spll_spread_spectrum_2 &= ~CLK_V_MASK; in rv730_populate_sclk_value()
102 cg_spll_spread_spectrum_2 |= CLK_V(clk_v); in rv730_populate_sclk_value()
111 sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cpu_to_be32(cg_spll_spread_spectrum_2); in rv730_populate_sclk_value()
207 pi->clk_regs.rv730.cg_spll_spread_spectrum_2 = in rv730_read_clock_registers()
351 cpu_to_be32(pi->clk_regs.rv730.cg_spll_spread_spectrum_2); in rv730_populate_smc_initial_state()
H A Drv770_dpm.h34 u32 cg_spll_spread_spectrum_2; member
50 u32 cg_spll_spread_spectrum_2; member
H A Dsi_dpm.h90 u32 cg_spll_spread_spectrum_2; member
H A Dni_dpm.h36 u32 cg_spll_spread_spectrum_2; member
H A Dci_dpm.h131 u32 cg_spll_spread_spectrum_2; member
H A Drv770_dpm.c499 u32 cg_spll_spread_spectrum_2 = in rv770_populate_sclk_value() local
500 pi->clk_regs.rv770.cg_spll_spread_spectrum_2; in rv770_populate_sclk_value()
552 cg_spll_spread_spectrum_2 &= ~CLKV_MASK; in rv770_populate_sclk_value()
553 cg_spll_spread_spectrum_2 |= CLKV(clk_v); in rv770_populate_sclk_value()
562 sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cpu_to_be32(cg_spll_spread_spectrum_2); in rv770_populate_sclk_value()
1062 cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum_2); in rv770_populate_smc_initial_state()
1530 pi->clk_regs.rv770.cg_spll_spread_spectrum_2 = in rv770_read_clock_registers()
H A Dsi_dpm.c3513 si_pi->clock_registers.cg_spll_spread_spectrum_2 = RREG32(CG_SPLL_SPREAD_SPECTRUM_2); in si_read_clock_registers()
4345 cpu_to_be32(si_pi->clock_registers.cg_spll_spread_spectrum_2); in si_populate_smc_initial_state()
4731 u32 cg_spll_spread_spectrum_2 = si_pi->clock_registers.cg_spll_spread_spectrum_2; in si_calculate_sclk_params() local
4773 cg_spll_spread_spectrum_2 &= ~CLK_V_MASK; in si_calculate_sclk_params()
4774 cg_spll_spread_spectrum_2 |= CLK_V(clk_v); in si_calculate_sclk_params()
4784 sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cg_spll_spread_spectrum_2; in si_calculate_sclk_params()
H A Dcypress_dpm.c1276 cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum_2); in cypress_populate_smc_initial_state()
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Diceland_smumgr.c804 uint32_t cg_spll_spread_spectrum_2 = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2; in iceland_calculate_sclk_params() local
858 cg_spll_spread_spectrum_2 = in iceland_calculate_sclk_params()
859 PHM_SET_FIELD(cg_spll_spread_spectrum_2, CG_SPLL_SPREAD_SPECTRUM_2, CLKV, clkV); in iceland_calculate_sclk_params()
867 sclk->SpllSpreadSpectrum2 = cg_spll_spread_spectrum_2; in iceland_calculate_sclk_params()
H A Dfiji_smumgr.c864 uint32_t cg_spll_spread_spectrum_2 = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2; in fiji_calculate_sclk_params() local
921 cg_spll_spread_spectrum_2 = PHM_SET_FIELD(cg_spll_spread_spectrum_2, in fiji_calculate_sclk_params()
930 sclk->SpllSpreadSpectrum2 = cg_spll_spread_spectrum_2; in fiji_calculate_sclk_params()
H A Dci_smumgr.c306 uint32_t cg_spll_spread_spectrum_2 = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2; in ci_calculate_sclk_params() local
356 cg_spll_spread_spectrum_2 = PHM_SET_FIELD(cg_spll_spread_spectrum_2, in ci_calculate_sclk_params()
365 sclk->SpllSpreadSpectrum2 = cg_spll_spread_spectrum_2; in ci_calculate_sclk_params()
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c4084 si_pi->clock_registers.cg_spll_spread_spectrum_2 = RREG32(mmCG_SPLL_SPREAD_SPECTRUM_2); in si_read_clock_registers()
4914 cpu_to_be32(si_pi->clock_registers.cg_spll_spread_spectrum_2); in si_populate_smc_initial_state()
5326 u32 cg_spll_spread_spectrum_2 = si_pi->clock_registers.cg_spll_spread_spectrum_2; in si_calculate_sclk_params() local
5368 cg_spll_spread_spectrum_2 &= ~CG_SPLL_SPREAD_SPECTRUM_2__CLK_V_MASK; in si_calculate_sclk_params()
5369 cg_spll_spread_spectrum_2 |= clk_v << CG_SPLL_SPREAD_SPECTRUM_2__CLK_V__SHIFT; in si_calculate_sclk_params()
5379 sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cg_spll_spread_spectrum_2; in si_calculate_sclk_params()