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Searched refs:cfgPCIE_PWR_BUDGET_CAP (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_offset.h140 #define cfgPCIE_PWR_BUDGET_CAP … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_offset.h508 #define cfgPCIE_PWR_BUDGET_CAP … macro