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Searched refs:cfgBIF_CFG_DEV0_EPF1_0_PCIE_PWR_BUDGET_CAP (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_6_1_offset.h542 #define cfgBIF_CFG_DEV0_EPF1_0_PCIE_PWR_BUDGET_CAP … macro
H A Dnbio_7_0_offset.h1014 #define cfgBIF_CFG_DEV0_EPF1_0_PCIE_PWR_BUDGET_CAP … macro
H A Dnbio_7_4_offset.h702 #define cfgBIF_CFG_DEV0_EPF1_0_PCIE_PWR_BUDGET_CAP … macro
H A Dnbio_2_3_offset.h1422 #define cfgBIF_CFG_DEV0_EPF1_0_PCIE_PWR_BUDGET_CAP … macro
H A Dnbio_4_3_0_offset.h3297 #define cfgBIF_CFG_DEV0_EPF1_0_PCIE_PWR_BUDGET_CAP … macro