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Searched refs:cfgBIF_CFG_DEV0_EPF0_VF5_MAX_LATENCY (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_9_0_offset.h8864 #define cfgBIF_CFG_DEV0_EPF0_VF5_MAX_LATENCY … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_3_1_offset.h724 #define cfgBIF_CFG_DEV0_EPF0_VF5_MAX_LATENCY … macro