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Searched refs:cc (Results 1 – 25 of 422) sorted by relevance

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/linux/drivers/bcma/
H A Ddriver_chipcommon.c18 static inline u32 bcma_cc_write32_masked(struct bcma_drv_cc *cc, u16 offset, in bcma_cc_write32_masked() argument
22 value |= bcma_cc_read32(cc, offset) & ~mask; in bcma_cc_write32_masked()
23 bcma_cc_write32(cc, offset, value); in bcma_cc_write32_masked()
28 u32 bcma_chipco_get_alp_clock(struct bcma_drv_cc *cc) in bcma_chipco_get_alp_clock() argument
30 if (cc->capabilities & BCMA_CC_CAP_PMU) in bcma_chipco_get_alp_clock()
31 return bcma_pmu_get_alp_clock(cc); in bcma_chipco_get_alp_clock()
37 static bool bcma_core_cc_has_pmu_watchdog(struct bcma_drv_cc *cc) in bcma_core_cc_has_pmu_watchdog() argument
39 struct bcma_bus *bus = cc->core->bus; in bcma_core_cc_has_pmu_watchdog()
41 if (cc->capabilities & BCMA_CC_CAP_PMU) { in bcma_core_cc_has_pmu_watchdog()
56 static u32 bcma_chipco_watchdog_get_max_timer(struct bcma_drv_cc *cc) in bcma_chipco_watchdog_get_max_timer() argument
[all …]
H A Ddriver_chipcommon_pmu.c16 u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset) in bcma_chipco_pll_read() argument
18 bcma_pmu_write32(cc, BCMA_CC_PMU_PLLCTL_ADDR, offset); in bcma_chipco_pll_read()
19 bcma_pmu_read32(cc, BCMA_CC_PMU_PLLCTL_ADDR); in bcma_chipco_pll_read()
20 return bcma_pmu_read32(cc, BCMA_CC_PMU_PLLCTL_DATA); in bcma_chipco_pll_read()
24 void bcma_chipco_pll_write(struct bcma_drv_cc *cc, u32 offset, u32 value) in bcma_chipco_pll_write() argument
26 bcma_pmu_write32(cc, BCMA_CC_PMU_PLLCTL_ADDR, offset); in bcma_chipco_pll_write()
27 bcma_pmu_read32(cc, BCMA_CC_PMU_PLLCTL_ADDR); in bcma_chipco_pll_write()
28 bcma_pmu_write32(cc, BCMA_CC_PMU_PLLCTL_DATA, value); in bcma_chipco_pll_write()
32 void bcma_chipco_pll_maskset(struct bcma_drv_cc *cc, u32 offset, u32 mask, in bcma_chipco_pll_maskset() argument
35 bcma_pmu_write32(cc, BCMA_CC_PMU_PLLCTL_ADDR, offset); in bcma_chipco_pll_maskset()
[all …]
H A Ddriver_gpio.c24 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_get_value() local
26 return !!bcma_chipco_gpio_in(cc, 1 << gpio); in bcma_gpio_get_value()
32 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_set_value() local
34 bcma_chipco_gpio_out(cc, 1 << gpio, value ? 1 << gpio : 0); in bcma_gpio_set_value()
41 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_direction_input() local
43 bcma_chipco_gpio_outen(cc, 1 << gpio, 0); in bcma_gpio_direction_input()
50 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_direction_output() local
52 bcma_chipco_gpio_outen(cc, 1 << gpio, 1 << gpio); in bcma_gpio_direction_output()
53 bcma_chipco_gpio_out(cc, 1 << gpio, value ? 1 << gpio : 0); in bcma_gpio_direction_output()
59 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_request() local
[all …]
H A Ddriver_chipcommon_nflash.c28 int bcma_nflash_init(struct bcma_drv_cc *cc) in bcma_nflash_init() argument
30 struct bcma_bus *bus = cc->core->bus; in bcma_nflash_init()
34 cc->core->id.rev != 38) { in bcma_nflash_init()
39 if (!(cc->capabilities & BCMA_CC_CAP_NFLASH)) { in bcma_nflash_init()
44 cc->nflash.present = true; in bcma_nflash_init()
45 if (cc->core->id.rev == 38 && in bcma_nflash_init()
46 (cc->status & BCMA_CC_CHIPST_5357_NAND_BOOT)) { in bcma_nflash_init()
47 cc->nflash.boot = true; in bcma_nflash_init()
49 reg = bcma_cc_read32(cc, BCMA_CC_NAND_CS_NAND_SELECT) & 0xff; in bcma_nflash_init()
50 cc->nflash.brcmnand_info.chip_select = ffs(reg) - 1; in bcma_nflash_init()
[all …]
H A Dbcma_private.h45 void bcma_core_chipcommon_early_init(struct bcma_drv_cc *cc);
46 void bcma_core_chipcommon_init(struct bcma_drv_cc *cc);
47 void bcma_chipco_bcm4331_ext_pa_lines_ctl(struct bcma_drv_cc *cc, bool enable);
49 void bcma_chipco_serial_init(struct bcma_drv_cc *cc);
57 void bcma_pmu_early_init(struct bcma_drv_cc *cc);
58 void bcma_pmu_init(struct bcma_drv_cc *cc);
59 u32 bcma_pmu_get_alp_clock(struct bcma_drv_cc *cc);
60 u32 bcma_pmu_get_cpu_clock(struct bcma_drv_cc *cc);
68 int bcma_pflash_init(struct bcma_drv_cc *cc);
70 static inline int bcma_pflash_init(struct bcma_drv_cc *cc) in bcma_pflash_init() argument
[all …]
H A Ddriver_chipcommon_sflash.c74 static void bcma_sflash_cmd(struct bcma_drv_cc *cc, u32 opcode) in bcma_sflash_cmd() argument
77 bcma_cc_write32(cc, BCMA_CC_FLASHCTL, in bcma_sflash_cmd()
80 if (!(bcma_cc_read32(cc, BCMA_CC_FLASHCTL) & in bcma_sflash_cmd()
85 bcma_err(cc->core->bus, "SFLASH control command failed (timeout)!\n"); in bcma_sflash_cmd()
89 int bcma_sflash_init(struct bcma_drv_cc *cc) in bcma_sflash_init() argument
91 struct bcma_bus *bus = cc->core->bus; in bcma_sflash_init()
92 struct bcma_sflash *sflash = &cc->sflash; in bcma_sflash_init()
96 switch (cc->capabilities & BCMA_CC_CAP_FLASHT) { in bcma_sflash_init()
98 bcma_sflash_cmd(cc, BCMA_CC_FLASHCTL_ST_DP); in bcma_sflash_init()
100 bcma_cc_write32(cc, BCMA_CC_FLASHADDR, 0); in bcma_sflash_init()
[all …]
/linux/drivers/ssb/
H A Ddriver_chipcommon.c32 static inline u32 chipco_write32_masked(struct ssb_chipcommon *cc, u16 offset, in chipco_write32_masked() argument
36 value |= chipco_read32(cc, offset) & ~mask; in chipco_write32_masked()
37 chipco_write32(cc, offset, value); in chipco_write32_masked()
42 void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc, in ssb_chipco_set_clockmode() argument
45 struct ssb_device *ccdev = cc->dev; in ssb_chipco_set_clockmode()
57 if (cc->capabilities & SSB_CHIPCO_CAP_PMU) in ssb_chipco_set_clockmode()
69 if (!(cc->capabilities & SSB_CHIPCO_CAP_PCTL)) in ssb_chipco_set_clockmode()
74 tmp = chipco_read32(cc, SSB_CHIPCO_SLOWCLKCTL); in ssb_chipco_set_clockmode()
76 chipco_write32(cc, SSB_CHIPCO_SLOWCLKCTL, tmp); in ssb_chipco_set_clockmode()
81 tmp = chipco_read32(cc, SSB_CHIPCO_SLOWCLKCTL); in ssb_chipco_set_clockmode()
[all …]
H A Ddriver_chipcommon_pmu.c22 static u32 ssb_chipco_pll_read(struct ssb_chipcommon *cc, u32 offset) in ssb_chipco_pll_read() argument
24 chipco_write32(cc, SSB_CHIPCO_PLLCTL_ADDR, offset); in ssb_chipco_pll_read()
25 return chipco_read32(cc, SSB_CHIPCO_PLLCTL_DATA); in ssb_chipco_pll_read()
28 static void ssb_chipco_pll_write(struct ssb_chipcommon *cc, in ssb_chipco_pll_write() argument
31 chipco_write32(cc, SSB_CHIPCO_PLLCTL_ADDR, offset); in ssb_chipco_pll_write()
32 chipco_write32(cc, SSB_CHIPCO_PLLCTL_DATA, value); in ssb_chipco_pll_write()
35 static void ssb_chipco_regctl_maskset(struct ssb_chipcommon *cc, in ssb_chipco_regctl_maskset() argument
40 chipco_read32(cc, SSB_CHIPCO_REGCTL_ADDR); in ssb_chipco_regctl_maskset()
41 chipco_write32(cc, SSB_CHIPCO_REGCTL_ADDR, offset); in ssb_chipco_regctl_maskset()
42 chipco_read32(cc, SSB_CHIPCO_REGCTL_ADDR); in ssb_chipco_regctl_maskset()
[all …]
H A Ddriver_chipcommon_sflash.c72 static void ssb_sflash_cmd(struct ssb_chipcommon *cc, u32 opcode) in ssb_sflash_cmd() argument
75 chipco_write32(cc, SSB_CHIPCO_FLASHCTL, in ssb_sflash_cmd()
78 if (!(chipco_read32(cc, SSB_CHIPCO_FLASHCTL) & in ssb_sflash_cmd()
83 dev_err(cc->dev->dev, "SFLASH control command failed (timeout)!\n"); in ssb_sflash_cmd()
87 int ssb_sflash_init(struct ssb_chipcommon *cc) in ssb_sflash_init() argument
89 struct ssb_sflash *sflash = &cc->dev->bus->mipscore.sflash; in ssb_sflash_init()
93 switch (cc->capabilities & SSB_CHIPCO_CAP_FLASHT) { in ssb_sflash_init()
95 ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_DP); in ssb_sflash_init()
97 chipco_write32(cc, SSB_CHIPCO_FLASHADDR, 0); in ssb_sflash_init()
98 ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_RES); in ssb_sflash_init()
[all …]
/linux/drivers/md/
H A Ddm-crypt.c79 struct crypt_config *cc; member
107 int (*ctr)(struct crypt_config *cc, struct dm_target *ti,
109 void (*dtr)(struct crypt_config *cc);
110 int (*init)(struct crypt_config *cc);
111 int (*wipe)(struct crypt_config *cc);
112 int (*generator)(struct crypt_config *cc, u8 *iv,
114 int (*post)(struct crypt_config *cc, u8 *iv,
259 struct crypt_config *cc = ti->private; in get_max_request_sectors() local
273 if (wrt || cc->used_tag_size) in get_max_request_sectors()
276 sector_align = max(bdev_logical_block_size(cc->dev->bdev), in get_max_request_sectors()
[all …]
/linux/arch/s390/pci/
H A Dpci_insn.c24 u8 cc; member
38 static inline void zpci_err_insn_req(int lvl, u8 insn, u8 cc, u8 status, in zpci_err_insn_req() argument
42 .insn = insn, .cc = cc, .status = status, in zpci_err_insn_req()
48 static inline void zpci_err_insn_addr(int lvl, u8 insn, u8 cc, u8 status, in zpci_err_insn_addr() argument
52 .insn = insn, .cc = cc, .status = status, in zpci_err_insn_addr()
61 int cc; in __mpcifc() local
65 CC_IPM(cc) in __mpcifc()
66 : CC_OUT(cc, cc), [req] "+d" (req), [fib] "+Q" (*fib) in __mpcifc()
70 return CC_TRANSFORM(cc); in __mpcifc()
76 u8 cc; in zpci_mod_fc() local
[all …]
/linux/mm/
H A Dcompaction.c188 static inline bool isolation_suitable(struct compact_control *cc, in isolation_suitable() argument
191 if (cc->ignore_skip_hint) in isolation_suitable()
419 static bool test_and_set_skip(struct compact_control *cc, struct page *page) in test_and_set_skip() argument
424 if (cc->ignore_skip_hint) in test_and_set_skip()
428 if (!skip && !cc->no_set_skip_hint) in test_and_set_skip()
434 static void update_cached_migrate(struct compact_control *cc, unsigned long pfn) in update_cached_migrate() argument
436 struct zone *zone = cc->zone; in update_cached_migrate()
439 if (cc->no_set_skip_hint) in update_cached_migrate()
447 if (cc->mode != MIGRATE_ASYNC && in update_cached_migrate()
456 static void update_pageblock_skip(struct compact_control *cc, in update_pageblock_skip() argument
[all …]
/linux/fs/f2fs/
H A Dcompress.c50 int (*init_compress_ctx)(struct compress_ctx *cc);
51 void (*destroy_compress_ctx)(struct compress_ctx *cc);
52 int (*compress_pages)(struct compress_ctx *cc);
59 static unsigned int offset_in_cluster(struct compress_ctx *cc, pgoff_t index) in offset_in_cluster() argument
61 return index & (cc->cluster_size - 1); in offset_in_cluster()
64 static pgoff_t cluster_idx(struct compress_ctx *cc, pgoff_t index) in cluster_idx() argument
66 return index >> cc->log_cluster_size; in cluster_idx()
69 static pgoff_t start_idx_of_cluster(struct compress_ctx *cc) in start_idx_of_cluster() argument
71 return cc->cluster_idx << cc->log_cluster_size; in start_idx_of_cluster()
98 static void f2fs_drop_rpages(struct compress_ctx *cc, int len, bool unlock) in f2fs_drop_rpages() argument
[all …]
/linux/sound/core/
H A Dump_convert.c123 buf[1] = midi2->cc.index; in cvt_ump_midi2_to_legacy()
124 buf[2] = downscale_32_to_7bit(midi2->cc.data); in cvt_ump_midi2_to_legacy()
290 static void reset_rpn(struct ump_cvt_to_ump_bank *cc) in reset_rpn() argument
292 cc->rpn_set = 0; in reset_rpn()
293 cc->nrpn_set = 0; in reset_rpn()
294 cc->cc_rpn_msb = cc->cc_rpn_lsb = 0; in reset_rpn()
295 cc->cc_data_msb = cc->cc_data_lsb = 0; in reset_rpn()
296 cc->cc_data_msb_set = cc->cc_data_lsb_set = 0; in reset_rpn()
299 static int fill_rpn(struct ump_cvt_to_ump_bank *cc, in fill_rpn() argument
303 if (!(cc->cc_data_lsb_set || cc->cc_data_msb_set)) in fill_rpn()
[all …]
/linux/drivers/s390/cio/
H A Dtrace.h25 TP_PROTO(struct subchannel_id schid, struct schib *schib, int cc),
26 TP_ARGS(schid, schib, cc),
44 __field(int, cc)
63 __entry->cc = cc;
68 __entry->cssid, __entry->ssid, __entry->schno, __entry->cc,
85 TP_PROTO(struct subchannel_id schid, struct schib *schib, int cc),
86 TP_ARGS(schid, schib, cc)
96 TP_PROTO(struct subchannel_id schid, struct schib *schib, int cc),
97 TP_ARGS(schid, schib, cc)
107 TP_PROTO(struct subchannel_id schid, struct irb *irb, int cc),
[all …]
H A Dioasm.c30 CC_IPM(cc) in __stsch()
32 : CC_OUT(cc, ccode), [addr] "=Q" (*addr), [exc] "+d" (exception) in __stsch()
60 CC_IPM(cc) in __msch()
62 : CC_OUT(cc, ccode), [exc] "+d" (exception) in __msch()
86 CC_IPM(cc) in __tsch()
87 : CC_OUT(cc, ccode), [addr] "=Q" (*addr) in __tsch()
114 CC_IPM(cc) in __ssch()
116 : CC_OUT(cc, ccode), [exc] "+d" (exception) in __ssch()
141 CC_IPM(cc) in __csch()
142 : CC_OUT(cc, ccode) in __csch()
[all …]
/linux/sound/core/seq/
H A Dseq_ump_convert.c111 ev->data.control.channel = val->cc.channel; in ump_midi1_to_cc_ev()
112 ev->data.control.param = val->cc.index; in ump_midi1_to_cc_ev()
113 ev->data.control.value = val->cc.data; in ump_midi1_to_cc_ev()
232 ev->data.control.channel = val->cc.channel; in ump_midi2_to_cc_ev()
233 ev->data.control.param = val->cc.index; in ump_midi2_to_cc_ev()
234 ev->data.control.value = downscale_32_to_7bit(val->cc.data); in ump_midi2_to_cc_ev()
371 struct ump_cvt_to_ump_bank *cc; in cvt_ump_midi1_to_midi2() local
391 cc = &dest_port->midi2_bank[midi1->note.channel]; in cvt_ump_midi1_to_midi2()
392 switch (midi1->cc.index) { in cvt_ump_midi1_to_midi2()
394 cc->bank_set = 1; in cvt_ump_midi1_to_midi2()
[all …]
/linux/kernel/time/
H A Dtimecounter.c9 struct cyclecounter *cc, in timecounter_init() argument
12 tc->cc = cc; in timecounter_init()
13 tc->cycle_last = cc->read(cc); in timecounter_init()
15 tc->mask = (1ULL << cc->shift) - 1; in timecounter_init()
37 cycle_now = tc->cc->read(tc->cc); in timecounter_read_delta()
40 cycle_delta = (cycle_now - tc->cycle_last) & tc->cc->mask; in timecounter_read_delta()
43 ns_offset = cyclecounter_cyc2ns(tc->cc, cycle_delta, in timecounter_read_delta()
69 static u64 cc_cyc2ns_backwards(const struct cyclecounter *cc, in cc_cyc2ns_backwards() argument
74 ns = ((ns * cc->mult) - frac) >> cc->shift; in cc_cyc2ns_backwards()
82 u64 delta = (cycle_tstamp - tc->cycle_last) & tc->cc->mask; in timecounter_cyc2time()
[all …]
/linux/sound/soc/qcom/qdsp6/
H A Dq6dsp-lpass-clocks.c39 struct q6dsp_cc *cc = dev_get_drvdata(clk->dev); in clk_q6dsp_prepare() local
41 return cc->desc->lpass_set_clk(clk->dev, clk->q6dsp_clk_id, clk->attributes, in clk_q6dsp_prepare()
48 struct q6dsp_cc *cc = dev_get_drvdata(clk->dev); in clk_q6dsp_unprepare() local
50 cc->desc->lpass_set_clk(clk->dev, clk->q6dsp_clk_id, clk->attributes, in clk_q6dsp_unprepare()
89 struct q6dsp_cc *cc = dev_get_drvdata(clk->dev); in clk_vote_q6dsp_block() local
91 return cc->desc->lpass_vote_clk(clk->dev, clk->q6dsp_clk_id, in clk_vote_q6dsp_block()
98 struct q6dsp_cc *cc = dev_get_drvdata(clk->dev); in clk_unvote_q6dsp_block() local
100 cc->desc->lpass_unvote_clk(clk->dev, clk->q6dsp_clk_id, clk->handle); in clk_unvote_q6dsp_block()
112 struct q6dsp_cc *cc = data; in q6dsp_of_clk_hw_get() local
117 dev_err(cc->dev, "Invalid clk specifier (%d, %d)\n", idx, attr); in q6dsp_of_clk_hw_get()
[all …]
/linux/drivers/clk/sprd/
H A Dcomposite.c15 struct sprd_comp *cc = hw_to_sprd_comp(hw); in sprd_comp_determine_rate() local
17 return divider_determine_rate(hw, req, NULL, cc->div.width, 0); in sprd_comp_determine_rate()
23 struct sprd_comp *cc = hw_to_sprd_comp(hw); in sprd_comp_recalc_rate() local
25 return sprd_div_helper_recalc_rate(&cc->common, &cc->div, parent_rate); in sprd_comp_recalc_rate()
31 struct sprd_comp *cc = hw_to_sprd_comp(hw); in sprd_comp_set_rate() local
33 return sprd_div_helper_set_rate(&cc->common, &cc->div, in sprd_comp_set_rate()
39 struct sprd_comp *cc = hw_to_sprd_comp(hw); in sprd_comp_get_parent() local
41 return sprd_mux_helper_get_parent(&cc->common, &cc->mux); in sprd_comp_get_parent()
46 struct sprd_comp *cc = hw_to_sprd_comp(hw); in sprd_comp_set_parent() local
48 return sprd_mux_helper_set_parent(&cc->common, &cc->mux, index); in sprd_comp_set_parent()
/linux/arch/m68k/
H A DMakefile19 CROSS_COMPILE := $(call cc-cross-prefix, \
41 cpuflags-$(CONFIG_M5441x) = $(call cc-option,-mcpu=54455,-mcfv4e)
42 cpuflags-$(CONFIG_M54xx) = $(call cc-option,-mcpu=5475,-m5200)
43 cpuflags-$(CONFIG_M5407) = $(call cc-option,-mcpu=5407,-m5200)
44 cpuflags-$(CONFIG_M532x) = $(call cc-option,-mcpu=532x,-m5307)
45 cpuflags-$(CONFIG_M537x) = $(call cc-option,-mcpu=537x,-m5307)
46 cpuflags-$(CONFIG_M5307) = $(call cc-option,-mcpu=5307,-m5200)
47 cpuflags-$(CONFIG_M528x) = $(call cc-option,-mcpu=528x,-m5307)
48 cpuflags-$(CONFIG_M5275) = $(call cc-option,-mcpu=5275,-m5307)
49 cpuflags-$(CONFIG_M5272) = $(call cc-option,-mcpu=5272,-m5307)
[all …]
/linux/include/linux/bcma/
H A Dbcma_driver_chipcommon.h664 #define bcma_cc_read32(cc, offset) \ argument
665 bcma_read32((cc)->core, offset)
666 #define bcma_cc_write32(cc, offset, val) \ argument
667 bcma_write32((cc)->core, offset, val)
669 #define bcma_cc_mask32(cc, offset, mask) \ argument
670 bcma_cc_write32(cc, offset, bcma_cc_read32(cc, offset) & (mask))
671 #define bcma_cc_set32(cc, offset, set) \ argument
672 bcma_cc_write32(cc, offset, bcma_cc_read32(cc, offset) | (set))
673 #define bcma_cc_maskset32(cc, offset, mask, set) \ argument
674 bcma_cc_write32(cc, offset, (bcma_cc_read32(cc, offset) & (mask)) | (set))
[all …]
/linux/include/linux/ssb/
H A Dssb_driver_chipcommon.h599 static inline bool ssb_chipco_available(struct ssb_chipcommon *cc) in ssb_chipco_available() argument
601 return (cc->dev != NULL); in ssb_chipco_available()
605 #define chipco_read32(cc, offset) ssb_read32((cc)->dev, offset) argument
606 #define chipco_write32(cc, offset, val) ssb_write32((cc)->dev, offset, val) argument
608 #define chipco_mask32(cc, offset, mask) \ argument
609 chipco_write32(cc, offset, chipco_read32(cc, offset) & (mask))
610 #define chipco_set32(cc, offset, set) \ argument
611 chipco_write32(cc, offset, chipco_read32(cc, offset) | (set))
612 #define chipco_maskset32(cc, offset, mask, set) \ argument
613 chipco_write32(cc, offset, (chipco_read32(cc, offset) & (mask)) | (set))
[all …]
/linux/arch/x86/include/asm/
H A Drmwcc.h9 #define __GEN_RMWcc(fullop, _var, cc, clobbers, ...) \ argument
13 : [var] "+m" (_var), "=@cc" #cc (c) \
18 #define GEN_UNARY_RMWcc_4(op, var, cc, arg0) \ argument
19 __GEN_RMWcc(op " " arg0, var, cc, __CLOBBERS_MEM())
21 #define GEN_UNARY_RMWcc_3(op, var, cc) \ argument
22 GEN_UNARY_RMWcc_4(op, var, cc, "%[var]")
26 #define GEN_BINARY_RMWcc_6(op, var, cc, vcon, _val, arg0) \ argument
27 __GEN_RMWcc(op " %[val], " arg0, var, cc, \
30 #define GEN_BINARY_RMWcc_5(op, var, cc, vcon, val) \ argument
31 GEN_BINARY_RMWcc_6(op, var, cc, vcon, val, "%[var]")
[all …]
/linux/net/sunrpc/xprtrdma/
H A Dsvc_rdma_rw.c152 * @cc: svc_rdma_chunk_ctxt to be initialized
155 struct svc_rdma_chunk_ctxt *cc) in svc_rdma_cc_init() argument
157 struct rpc_rdma_cid *cid = &cc->cc_cid; in svc_rdma_cc_init()
162 INIT_LIST_HEAD(&cc->cc_rwctxts); in svc_rdma_cc_init()
163 cc->cc_sqecount = 0; in svc_rdma_cc_init()
169 * @cc: svc_rdma_chunk_ctxt to be released
173 struct svc_rdma_chunk_ctxt *cc, in svc_rdma_cc_release() argument
180 trace_svcrdma_cc_release(&cc->cc_cid, cc->cc_sqecount); in svc_rdma_cc_release()
183 while ((ctxt = svc_rdma_next_ctxt(&cc in svc_rdma_cc_release()
241 struct svc_rdma_chunk_ctxt *cc = &ctxt->sc_reply_info.wi_cc; svc_rdma_reply_chunk_release() local
258 struct svc_rdma_chunk_ctxt *cc = svc_rdma_reply_done() local
287 struct svc_rdma_chunk_ctxt *cc = svc_rdma_write_done() local
321 struct svc_rdma_chunk_ctxt *cc = svc_rdma_wc_read_done() local
363 svc_rdma_post_chunk_ctxt(struct svcxprt_rdma * rdma,struct svc_rdma_chunk_ctxt * cc) svc_rdma_post_chunk_ctxt() argument
474 struct svc_rdma_chunk_ctxt *cc = &info->wi_cc; svc_rdma_build_writes() local
609 struct svc_rdma_chunk_ctxt *cc; svc_rdma_send_write_chunk() local
685 struct svc_rdma_chunk_ctxt *cc = &info->wi_cc; svc_rdma_prepare_reply_chunk() local
736 struct svc_rdma_chunk_ctxt *cc = &head->rc_cc; svc_rdma_build_read_segment() local
1119 struct svc_rdma_chunk_ctxt *cc = &head->rc_cc; svc_rdma_process_read_list() local
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