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Searched refs:cacheline_size (Results 1 – 11 of 11) sorted by relevance

/linux/tools/perf/util/
H A Dcacheline.h7 int __pure cacheline_size(void);
16 u64 size = cacheline_size(); in cl_address()
27 u64 size = cacheline_size(); in cl_offset()
H A Dcacheline.c17 int cacheline_size(void) in cacheline_size() function
H A Dsort.c3617 if (sd->entry == &sort_mem_dcacheline && cacheline_size() == 0) in setup_sort_order()
3663 if (!cacheline_size() && !strncasecmp(tok, "dcacheline", strlen(tok)))
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_topology.h103 uint32_t cacheline_size; member
H A Dkfd_topology.c360 cache->cacheline_size); in kfd_cache_show()
1645 pcache->cacheline_size = pcache_info[cache_type].cache_line_size; in fill_in_l1_pcache()
1714 pcache->cacheline_size = pcache_info[cache_type].cache_line_size; in fill_in_l2_l3_pcache()
/linux/drivers/gpu/drm/i915/display/
H A Di9xx_wm.c24 u8 cacheline_size; member
366 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
374 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
382 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
390 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
398 .cacheline_size = I915_FIFO_LINE_SIZE,
406 .cacheline_size = I915_FIFO_LINE_SIZE,
414 .cacheline_size = I915_FIFO_LINE_SIZE,
422 .cacheline_size = I830_FIFO_LINE_SIZE,
430 .cacheline_size = I830_FIFO_LINE_SIZE,
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/linux/drivers/scsi/
H A Dmyrb.h297 unsigned short cacheline_size; /* Bytes 104-105 */ member
H A Dmyrs.h413 enum myrs_cacheline_size cacheline_size; /* Byte 7 */ member
H A Dmyrs.c1575 if (ldev_info->cacheline_size) { in myrs_mode_sense()
1577 put_unaligned_be16(1 << ldev_info->cacheline_size, in myrs_mode_sense()
/linux/drivers/pci/
H A Dpci.c4372 u8 cacheline_size; in pci_set_cacheline_size() local
4379 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
4380 if (cacheline_size >= pci_cache_line_size && in pci_set_cacheline_size()
4381 (cacheline_size % pci_cache_line_size) == 0) in pci_set_cacheline_size()
4387 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
4388 if (cacheline_size == pci_cache_line_size) in pci_set_cacheline_size()
/linux/drivers/net/ethernet/broadcom/
H A Dtg3.c17137 int cacheline_size; in tg3_calc_dma_bndry() local
17143 cacheline_size = 1024; in tg3_calc_dma_bndry()
17145 cacheline_size = (int) byte * 4; in tg3_calc_dma_bndry()
17185 switch (cacheline_size) { in tg3_calc_dma_bndry()
17210 switch (cacheline_size) { in tg3_calc_dma_bndry()
17227 switch (cacheline_size) { in tg3_calc_dma_bndry()