| /linux/arch/loongarch/include/asm/ |
| H A D | cacheflush.h | 51 #define cache_op(op, addr) \ macro 61 cache_op(Index_Writeback_Inv_LEAF0, addr); in flush_cache_line() 64 cache_op(Index_Writeback_Inv_LEAF1, addr); in flush_cache_line() 67 cache_op(Index_Writeback_Inv_LEAF2, addr); in flush_cache_line() 70 cache_op(Index_Writeback_Inv_LEAF3, addr); in flush_cache_line() 73 cache_op(Index_Writeback_Inv_LEAF4, addr); in flush_cache_line() 76 cache_op(Index_Writeback_Inv_LEAF5, addr); in flush_cache_line()
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| /linux/arch/mips/include/asm/ |
| H A D | r4kcache.h | 57 #define cache_op(op, addr) \ macro 62 cache_op(Index_Invalidate_I, addr); in flush_icache_line_indexed() 67 cache_op(Index_Writeback_Inv_D, addr); in flush_dcache_line_indexed() 72 cache_op(Index_Writeback_Inv_SD, addr); in flush_scache_line_indexed() 79 cache_op(Hit_Invalidate_I_Loongson2, addr); in flush_icache_line() 83 cache_op(Hit_Invalidate_I, addr); in flush_icache_line() 90 cache_op(Hit_Writeback_Inv_D, addr); in flush_dcache_line() 95 cache_op(Hit_Invalidate_D, addr); in invalidate_dcache_line() 100 cache_op(Hit_Invalidate_SD, addr); in invalidate_scache_line() 105 cache_op(Hit_Writeback_Inv_SD, addr); in flush_scache_line() [all …]
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| H A D | bmips.h | 99 cache_op(Index_Load_Tag_S, ZSCM_REG_BASE + offset); in bmips_read_zscm_reg() 120 cache_op(Index_Store_Tag_S, ZSCM_REG_BASE + offset); in bmips_write_zscm_reg()
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| /linux/arch/csky/mm/ |
| H A D | dma-mapping.c | 14 static inline void cache_op(phys_addr_t paddr, size_t size, in cache_op() function 55 cache_op(page_to_phys(page), size, dma_wbinv_set_zero_range); in arch_dma_prep_coherent() 63 cache_op(paddr, size, dma_wb_range); in arch_sync_dma_for_device() 67 cache_op(paddr, size, dma_wbinv_range); in arch_sync_dma_for_device() 82 cache_op(paddr, size, dma_inv_range); in arch_sync_dma_for_cpu()
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| /linux/arch/mips/mm/ |
| H A D | sc-rm7k.c | 99 cache_op(Page_Invalidate_T, start); in blast_rm7k_tcache() 117 cache_op(Index_Store_Tag_T, CKSEG0ADDR(i)); in __rm7k_tc_enable() 143 cache_op(Index_Store_Tag_SD, CKSEG0ADDR(i)); in __rm7k_sc_enable() 210 cache_op(Index_Store_Tag_T, begin); in __probe_tcache() 215 cache_op(Index_Load_Tag_T, addr); in __probe_tcache()
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| H A D | sc-r5k.c | 30 cache_op(R5K_Page_Invalidate_S, start); in blast_r5000_scache() 54 cache_op(R5K_Page_Invalidate_S, a); in r5k_dma_cache_inv_sc()
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| H A D | sc-mips.c | 40 cache_op(Hit_Writeback_Inv_SD, addr & almask); in mips_sc_inv() 41 cache_op(Hit_Writeback_Inv_SD, (addr + size - 1) & almask); in mips_sc_inv()
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| H A D | c-r4k.c | 1417 cache_op(Index_Store_Tag_I, begin); in probe_scache() 1418 cache_op(Index_Store_Tag_D, begin); in probe_scache() 1419 cache_op(Index_Store_Tag_SD, begin); in probe_scache() 1424 cache_op(Index_Load_Tag_SD, addr); in probe_scache()
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| H A D | uasm-mips.c | 68 [insn_cache] = {M(cache_op, 0, 0, 0, 0, 0), RS | RT | SIMM},
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| /linux/arch/mips/sgi-ip22/ |
| H A D | ip28-berr.c | 74 cache_op(Index_Load_Tag_S, addr); in save_cache_tags() 77 cache_op(Index_Load_Tag_S, addr | 1L); in save_cache_tags() 92 cache_op(Index_Load_Tag_D, addr); in save_cache_tags() 95 cache_op(Index_Load_Tag_D, addr | 1L); in save_cache_tags() 108 cache_op(Index_Load_Tag_I, addr); in save_cache_tags() 111 cache_op(Index_Load_Tag_I, addr | 1L); in save_cache_tags()
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| /linux/tools/perf/util/ |
| H A D | parse-events.c | 368 int len, cache_type = -1, cache_op = -1, cache_result = -1; in parse_events__decode_legacy_cache() local 378 cache_op = parse_aliases(str, evsel__hw_cache_op, in parse_events__decode_legacy_cache() 380 if (cache_op >= 0) { in parse_events__decode_legacy_cache() 381 if (!evsel__is_cache_op_valid(cache_type, cache_op)) in parse_events__decode_legacy_cache() 392 if (cache_op < 0) { in parse_events__decode_legacy_cache() 393 cache_op = parse_aliases(str, evsel__hw_cache_op, in parse_events__decode_legacy_cache() 395 if (cache_op >= 0) { in parse_events__decode_legacy_cache() 396 if (!evsel__is_cache_op_valid(cache_type, cache_op)) in parse_events__decode_legacy_cache() 408 if (cache_op == -1) in parse_events__decode_legacy_cache() 409 cache_op = PERF_COUNT_HW_CACHE_OP_READ; in parse_events__decode_legacy_cache() [all …]
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| H A D | pmu.c | 1595 int cache_op = (term->val.num >> 8) & 0xFF; in pmu_config_term() local 1599 assert(cache_op < PERF_COUNT_HW_CACHE_OP_MAX); in pmu_config_term()
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| /linux/arch/loongarch/kernel/ |
| H A D | perf_event.c | 603 unsigned int cache_type, cache_op, cache_result; in loongarch_pmu_map_cache_event() local 610 cache_op = (config >> 8) & 0xff; in loongarch_pmu_map_cache_event() 611 if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX) in loongarch_pmu_map_cache_event() 620 [cache_op] in loongarch_pmu_map_cache_event()
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| /linux/arch/mips/txx9/generic/ |
| H A D | setup.c | 156 cache_op(Index_Writeback_Inv_D, addr | 0); in early_flush_dcache() 157 cache_op(Index_Writeback_Inv_D, addr | 1); in early_flush_dcache() 158 cache_op(Index_Writeback_Inv_D, addr | 2); in early_flush_dcache() 159 cache_op(Index_Writeback_Inv_D, addr | 3); in early_flush_dcache()
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| /linux/tools/perf/pmu-events/ |
| H A D | make_legacy_cache.py | 66 cache_id: int, cache_op: int, cache_result: int,
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| /linux/arch/x86/events/ |
| H A D | core.c | 378 unsigned int cache_type, cache_op, cache_result; in set_ext_hw_attr() local 388 cache_op = (config >> 8) & 0xff; in set_ext_hw_attr() 389 if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX) in set_ext_hw_attr() 391 cache_op = array_index_nospec(cache_op, PERF_COUNT_HW_CACHE_OP_MAX); in set_ext_hw_attr() 398 val = hybrid_var(event->pmu, hw_cache_event_ids)[cache_type][cache_op][cache_result]; in set_ext_hw_attr() 406 attr->config1 = hybrid_var(event->pmu, hw_cache_extra_regs)[cache_type][cache_op][cache_result]; in set_ext_hw_attr()
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| /linux/arch/mips/include/uapi/asm/ |
| H A D | inst.h | 34 sdl_op, sdr_op, swr_op, cache_op, enumerator
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| /linux/arch/mips/kvm/ |
| H A D | vz.c | 1235 case cache_op: in kvm_trap_vz_handle_gpsi()
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