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Searched refs:cache_num_ways (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/
H A Ddcn321_resource.c1751 dc->caps.cache_num_ways = 16; in dcn321_resource_construct()
2079 dc->dml2_options.mall_cfg.cache_num_ways = dc->caps.cache_num_ways; in dcn321_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.c2083 lines_per_way = total_cache_lines / dc->caps.cache_num_ways; in dcn32_calculate_mall_ways_from_bytes()
2254 dc->caps.cache_num_ways = 16; in dcn32_resource_construct()
2591 dc->dml2_options.mall_cfg.cache_num_ways = dc->caps.cache_num_ways; in dcn32_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc.h350 uint32_t cache_num_ways; member
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c1243 if (ways <= dc->caps.cache_num_ways && !mall_ss_unsupported) { in dcn401_apply_idle_power_optimizations()
3899 uint32_t mall_sel = (num_ways <= dc->caps.cache_num_ways && in dcn401_program_mall_pipe_config_sequence()